Datasheet > 74LVC1G10

74LVC1G10

更新时间： 2024-11-20 08:04:11

品牌	Logo	应用领域
美台 - DIODES		输入元件
页数	文件大小	规格书
14页	283K
描述
SINGLE 3 INPUT POSITIVE NAND GATE

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74LVC1G10 数据手册

74LVC1G10

SINGLE 3 INPUT POSITIVE NAND GATE

Description

Pin Assignments

The 74LVC1G10 is a single 3-input positive NAND gate with

a standard totem pole output. The device is designed for

operation with a power supply range of 1.65V to 5.5V. The

inputs are tolerant to 5.5V allowing this device to be used in a

mixed voltage environment. The device is fully specified for

partial power down applications using IOFF. The IOFF

circuitry disables the output preventing damaging current

backflow when the device is powered down.

The gate performs the positive Boolean function:

Y = A •B • C or Y = A + B + C

Features

Applications

•

Voltage Level Shifting

•

Wide Supply Voltage Range from 1.65V to 5.5V

± 24mA Output Drive at 3.3V

General Purpose Logic

Power Down Signal Isolation

Wide array of products such as:

CMOS low power consumption

IOFF Supports Partial-Power-Down Mode Operation

Inputs accept up to 5.5V

PCs, networking, notebooks, netbooks, PDAs

Computer peripherals, hard drives, CD/DVD ROM

TV, DVD, DVR, set top box

ESD Protection Exceeds JESD 22

200-V Machine Model (A115-A)

Cell Phones, Personal Navigation / GPS

MP3 players ,Cameras, Video Recorders

2000-V Human Body Model (A114-A)

Latch-Up Exceeds 100mA per JESD 78, Class II

Range of Package Options

•

SOT26, SOT363, and DFN1010: Available in “Green”

Molding Compound (no Br, Sb)

•

Lead Free Finish/ RoHS Compliant (Note 1)

Notes: 1. EU Directive 2002/95/EC (RoHS). All applicable RoHS exemptions applied. Please visit our website at

http://www.diodes.com/products/lead_free.html.

1 of 14

www.diodes.com

December 2010

74LVC1G10

Document number: DS35121 Rev. 1 - 2

12 3 4 5 6 7...14

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