5秒后页面跳转
74LV132DB,112 PDF预览

74LV132DB,112

更新时间: 2024-11-20 14:47:07
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
17页 97K
描述
74LV132 - Quad 2-input NAND Schmitt trigger SSOP1 14-Pin

74LV132DB,112 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:SSOP1包装说明:5.30 MM, PLASTIC, MO-150, SOT337-1, SSOP-14
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.3
系列:LV/LV-A/LVX/HJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:6.2 mm
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
最大I(ol):0.006 A湿度敏感等级:1
功能数量:4输入次数:2
端子数量:14最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP14,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
包装方法:TUBE峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:25 ns
传播延迟(tpd):43 ns认证状态:Not Qualified
施密特触发器:YES座面最大高度:2 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):1 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:NICKEL PALLADIUM GOLD
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:5.3 mmBase Number Matches:1

74LV132DB,112 数据手册

 浏览型号74LV132DB,112的Datasheet PDF文件第2页浏览型号74LV132DB,112的Datasheet PDF文件第3页浏览型号74LV132DB,112的Datasheet PDF文件第4页浏览型号74LV132DB,112的Datasheet PDF文件第5页浏览型号74LV132DB,112的Datasheet PDF文件第6页浏览型号74LV132DB,112的Datasheet PDF文件第7页 
74LV132  
Quad 2-input NAND Schmitt trigger  
Rev. 05 — 2 July 2009  
Product data sheet  
1. General description  
The 74LV132 is a low-voltage Si-gate CMOS device that is pin and function compatible  
with 74HC132 and 74HCT132.  
The 74LV132 contains four 2-input NAND gates which accept standard input signals.  
They are capable of transforming slowly changing input signals into sharply defined,  
jitter-free output signals.  
The gate switches at different points for positive and negative-going signals. The  
difference between the positive voltage VT+ and the negative voltage VTis defined as the  
input hysteresis voltage VH.  
2. Features  
I Wide operating voltage: 1.0 V to 5.5 V  
I Optimized for low voltage applications: 1.0 V to 3.6 V  
I Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V  
I Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C  
I Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and  
Tamb = 25 °C  
I ESD protection:  
N HBM JESD22-A114E exceeds 2000 V  
N MM JESD22-A115-A exceeds 200 V  
I Multiple package options  
I Specified from 40 °C to +85 °C and from 40 °C to +125 °C  
3. Applications  
I Wave and pulse shapers for highly noisy environments  
I Astable multivibrators  
I Monostable multivibrators  
 
 
 

74LV132DB,112 替代型号

型号 品牌 替代类型 描述 数据表
74LV132DB,118 NXP

完全替代

74LV132 - Quad 2-input NAND Schmitt trigger SSOP1 14-Pin
74LV132DB-T NXP

类似代替

IC LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDSO14, 5.30 MM, PLASTIC, MO-150, SOT337-
74LV132DB NXP

类似代替

Quad 2-input NAND Schmitt-trigger

与74LV132DB,112相关器件

型号 品牌 获取价格 描述 数据表
74LV132DB,118 NXP

获取价格

74LV132 - Quad 2-input NAND Schmitt trigger SSOP1 14-Pin
74LV132DB-T NXP

获取价格

IC LV/LV-A/LVX/H SERIES, QUAD 2-INPUT NAND GATE, PDSO14, 5.30 MM, PLASTIC, MO-150, SOT337-
74LV132D-Q100 NEXPERIA

获取价格

Quad 2-input NAND Schmitt trigger
74LV132D-T ETC

获取价格

Quad 2-input NAND Gate
74LV132N NXP

获取价格

Quad 2-input NAND Schmitt-trigger
74LV132N,112 NXP

获取价格

74LV132N
74LV132PW NXP

获取价格

Quad 2-input NAND Schmitt-trigger
74LV132PW NEXPERIA

获取价格

Quad 2-input NAND Schmitt triggerProduction
74LV132PW,112 NXP

获取价格

暂无描述
74LV132PW,118 NXP

获取价格

74LV132 - Quad 2-input NAND Schmitt trigger TSSOP 14-Pin