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74HC174PW-Q100 PDF预览

74HC174PW-Q100

更新时间: 2024-11-02 01:18:47
品牌 Logo 应用领域
安世 - NEXPERIA /
页数 文件大小 规格书
16页 730K
描述
Hex D-type flip-flop with reset; positive-edge trigger

74HC174PW-Q100 数据手册

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74HC174-Q100; 74HCT174-Q100  
Hex D-type flip-flop with reset; positive-edge trigger  
Rev. 1 — 17 April 2013  
Product data sheet  
1. General description  
The 74HC174-Q100; 74HCT174-Q100 are hex positive edge-triggered D-type flip-flops  
with individual data inputs (Dn) and outputs (Qn). The common clock (CP) and master  
reset (MR) inputs load and reset all flip-flops simultaneously. The D-input that meets the  
set-up and hold time requirements on the LOW-to-HIGH clock transition is stored in the  
flip-flop and appears at the Q output. A LOW on MR causes the flip-flops and outputs to  
be reset LOW. Inputs include clamp diodes. This enables the use of current limiting  
resistors to interface inputs to voltages in excess of VCC  
.
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
Input levels:  
For 74HC174-Q100: CMOS level  
For 74HCT174-Q100: TTL level  
Six edge-triggered D-type flip-flops  
Asynchronous master reset  
Complies with JEDEC standard no. 7A  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  
Multiple package options  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74HC174D-Q100  
74HCT174D-Q100  
74HC174PW-Q100  
74HCT174PW-Q100  
40 C to +125 C  
SO16  
plastic small outline package; 16 leads; body width SOT109-1  
3.9 mm  
40 C to +125 C  
TSSOP16  
plastic thin shrink small outline package; 16 leads; SOT403-1  
body width 4.4 mm  

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