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74HC175D PDF预览

74HC175D

更新时间: 2024-11-19 14:57:23
品牌 Logo 应用领域
东芝 - TOSHIBA /
页数 文件大小 规格书
11页 206K
描述
Quad D-Type Flip-Flop, SOIC16

74HC175D 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:SOP,Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:1.55
系列:HC/UHJESD-30 代码:R-PDSO-G16
长度:9.9 mm逻辑集成电路类型:D FLIP-FLOP
位数:4功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-40 °C输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED传播延迟(tpd):210 ns
座面最大高度:1.75 mm最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):4.5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:3.9 mm最小 fmax:24 MHz
Base Number Matches:1

74HC175D 数据手册

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74HC175D  
CMOS Digital Integrated Circuits Silicon Monolithic  
74HC175D  
1. Functional Description  
Quad D-Type Flip-Flop with Clear  
2. General  
The 74HC175D is a high speed CMOS D-TYPE FLIP FLOP fabricated with silicon gate C2MOS technology.  
It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power  
dissipation.  
Information signals applied to D inputs are transferred to the Q and Q outputs on the positive going edge of the  
clock pulse.  
When the CLR input is held low, the Q outputs are at the low logic level and the Q outputs are at the high logic  
level independent of the other inputs.  
All inputs are equipped with protection circuits against static discharge or transient excess voltage.  
3. Features  
(1) High speed: fMAX = 63 MHz (typ.) at VCC = 5 V  
(2) Low power dissipation: ICC = 4.0 µA (max) at Ta = 25  
(3) Balanced propagation delays: tPLH tPHL  
(4) Wide operating voltage range: VCC(opr) = 2.0 V to 6.0 V  
4. Packaging  
SOIC16  
Start of commercial production  
2016-05  
©2016 Toshiba Corporation  
2016-08-04  
Rev.3.0  
1

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