5秒后页面跳转
74HC166PW-Q100 PDF预览

74HC166PW-Q100

更新时间: 2024-11-02 01:10:47
品牌 Logo 应用领域
安世 - NEXPERIA /
页数 文件大小 规格书
19页 1161K
描述
8-bit parallel-in/serial out shift register

74HC166PW-Q100 数据手册

 浏览型号74HC166PW-Q100的Datasheet PDF文件第2页浏览型号74HC166PW-Q100的Datasheet PDF文件第3页浏览型号74HC166PW-Q100的Datasheet PDF文件第4页浏览型号74HC166PW-Q100的Datasheet PDF文件第5页浏览型号74HC166PW-Q100的Datasheet PDF文件第6页浏览型号74HC166PW-Q100的Datasheet PDF文件第7页 
74HC166-Q100; 74HCT166-Q100  
8-bit parallel-in/serial out shift register  
Rev. 1 — 25 September 2013  
Product data sheet  
1. General description  
The 74HC166-Q100; 74HCT166-Q100 is an 8-bit serial or parallel-in/serial-out shift  
register. The device features a serial data input (DS), eight parallel data inputs (D0 to D7)  
and a serial output (Q7). When the parallel enable input (PE) is LOW, the data from D0 to  
D7 is loaded into the shift register on the next LOW-to-HIGH transition of the clock input  
(CP). When PE is HIGH, data enters the register serially at DS with each LOW-to-HIGH  
transition of CP. When the clock enable input (CE) is LOW data is shifted on the  
LOW-to-HIGH transitions of CP. A HIGH on CE disables the CP input. Inputs include  
clamp diodes which enable the use of current limiting resistors to interface inputs to  
voltages in excess of VCC  
.
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
Synchronous parallel-to-serial applications  
Synchronous serial input for easy expansion  
Complies with JEDEC standard no. 7A  
Input levels:  
For 74HC166-Q100: CMOS level  
For 74HCT166-Q100: TTL level  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  
Multiple package options  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74HC166D-Q100  
74HCT166D-Q100  
74HC166PW-Q100  
40 C to +125 C  
SO16  
plastic small outline package; 16 leads; body  
width 3.9 mm  
SOT109-1  
40 C to +125 C  
TSSOP16 plastic thin shrink small outline package; 16 leads; SOT403-1  
body width 4.4 mm  

与74HC166PW-Q100相关器件

型号 品牌 获取价格 描述 数据表
74HC166-Q100 NEXPERIA

获取价格

8-bit parallel-in/serial out shift register
74HC173 NXP

获取价格

Quad D-type flip-flop; positive-edge trigger; 3-state
74HC173D NEXPERIA

获取价格

Quad D-type flip-flop; positive-edge trigger; 3-stateProduction
74HC173D NXP

获取价格

Quad D-type flip-flop; positive-edge trigger; 3-state
74HC173D,653 NXP

获取价格

74HC(T)173 - Quad D-type flip-flop; positive-edge trigger; 3-state SOP 16-Pin
74HC173D/T3 NXP

获取价格

IC HC/UH SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO16, SOT-109, SO-16,
74HC173DB,112 NXP

获取价格

74HC(T)173 - Quad D-type flip-flop; positive-edge trigger; 3-state SSOP1 16-Pin
74HC173DB,118 NXP

获取价格

74HC(T)173 - Quad D-type flip-flop; positive-edge trigger; 3-state SSOP1 16-Pin
74HC173D-Q100 NEXPERIA

获取价格

Quad D-type flip-flop; positive-edge trigger; 3-stateProduction
74HC173D-T ETC

获取价格

Quad D-Type Flip-Flop