Datasheet > 74AUP1T34-Q100

74AUP1T34-Q100

更新时间： 2022-02-26 12:42:06

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
17页	262K
描述
Low-power dual supply translating buffer

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

74AUP1T34-Q100 数据手册

74AUP1T34-Q100

Low-power dual supply translating buffer

Rev. 2 — 14 January 2019

Product data sheet

1. General description

The 74AUP1T34-Q100 provides a single buffer with two separate supply voltages. Input A is

designed to track V_CC(A). Output Y is designed to track V_CC(Y). Both, V_CC(A)and V_CC(Y)accepts any

supply voltage from 1.1 V to 3.6 V. This feature allows universal low voltage interfacing between

any of the 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V voltage nodes.

Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times

across the entire V_CCrange from 1.1 V to 3.6 V. This device ensures a very low static and dynamic

power consumption across the entire V_CCrange from 1.1 V to 3.6 V. This device is fully specified

for partial power-down applications using I_OFF. The I_OFFcircuitry disables the output, preventing the

damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100

(Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

•

Automotive product qualification in accordance with AEC-Q100 (Grade 1)

Specified from -40 °C to +85 °C and from -40 °C to +125 °C

•

Wide supply voltage range from 1.1 V to 3.6 V

High noise immunity

Complies with JEDEC standards:

•

JESD8-7 (1.2 V to 1.95 V)

JESD8-5 (1.8 V to 2.7 V)

JESD8-B (2.7 V to 3.6 V)

•

ESD protection:

•

MIL-STD-883, method 3015 Class 3A. Exceeds 5000 V

HBM JESD22-A114F Class 3A. Exceeds 5000 V

MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)

Wide supply voltage range:

•

V_CC(A): 1.1 V to 3.6 V

V_CC(Y): 1.1 V to 3.6 V

•

Low static power consumption; I_CC= 0.9 µA (maximum)

Each port operates over the full 1.1 V to 3.6 V power supply range

Latch-up performance exceeds 100 mA per JESD 78 Class II

Inputs accept voltages up to 3.6 V

Low noise overshoot and undershoot < 10 % of V_CC

I_OFFcircuitry provides partial Power-down mode operation

12 3 4 5 6 7...17

下载PDF

与74AUP1T34-Q100相关器件

型号	品牌	描述	获取价格	数据表
74AUP1T45	NXP	Low-power dual supply translating transceiver; 3-state	获取价格
74AUP1T45GF	NXP	Low-power dual supply translating transceiver; 3-state	获取价格
74AUP1T45GF,132	NXP	74AUP1T45 - Low-power dual supply translating transceiver; 3-state SON 6-Pin	获取价格
74AUP1T45GM	NEXPERIA	Low-power dual supply translating transceiver; 3-stateProduction	获取价格
74AUP1T45GM	NXP	Low-power dual supply translating transceiver; 3-state	获取价格
74AUP1T45GN	NEXPERIA	Low-power dual supply translating transceiver; 3-stateProduction	获取价格