5秒后页面跳转
捷配首页

Datasheet > 74ALVCH162601DGG
74ALVCH162601DGG PDF预览

74ALVCH162601DGG

更新时间： 2024-11-22 11:14:15
品牌 Logo 应用领域
安世 - NEXPERIA 光电二极管逻辑集成电路
页数 文件大小 规格书
15页 228K
描述
18-bit universal bus transceiver with 30 Ohm termination resistor; 3-stateProduction

阅读下载

中文翻译

获取价格

74ALVCH162601DGG 技术参数

是否Rohs认证： 符合生命周期：Active
包装说明：TSSOP,Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.24
系列：ALVC/VCX/AJESD-30 代码：R-PDSO-G56
JESD-609代码：e4长度：14 mm
逻辑集成电路类型：REGISTERED BUS TRANSCEIVER湿度敏感等级：2
位数：18功能数量：1
端口数量：2端子数量：56
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE WITH SERIES RESISTOR输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：260传播延迟（tpd）：6.4 ns
认证状态：Not Qualified座面最大高度：1.2 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：1.2 V
标称供电电压 (Vsup)：2.4 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：30宽度：6.1 mm
Base Number Matches：1

74ALVCH162601DGG 数据手册

 浏览型号74ALVCH162601DGG的Datasheet PDF文件第2页浏览型号74ALVCH162601DGG的Datasheet PDF文件第3页浏览型号74ALVCH162601DGG的Datasheet PDF文件第4页浏览型号74ALVCH162601DGG的Datasheet PDF文件第5页浏览型号74ALVCH162601DGG的Datasheet PDF文件第6页浏览型号74ALVCH162601DGG的Datasheet PDF文件第7页 
74ALVCH162601  
18-bit universal bus transceiver with 30 Ω termination  
resistor; 3-state  
Rev. 2 — 13 August 2018  
Product data sheet  
1. General description  
The 74ALVCH162601 is an 18-bit universal transceiver featuring non-inverting 3-state bus  
compatible outputs in both send and receive directions. Data flow in each direction is controlled by  
output enable (OEAB and OEBA), latch enable (LEAB and LEBA) and clock (CPAB and CPBA)  
inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is HIGH.  
When LEAB is LOW, the A data is latched if CPAB is held at a HIGH or LOW logic level. If LEAB is  
LOW, the A-bus data is stored in the latch/flip-flop on the LOW-to-HIGH transition of CPAB. When  
OEAB is LOW, the outputs are active. When OEAB is HIGH, the outputs are in the high-impedance  
state. The clocks can be controlled with the clock-enable inputs (CEBA and CEAB).  
Data flow for B-to-A is similar to that of A-to-B but uses OEBA, LEBA and CPBA.  
To ensure the high impedance state during power up or power down, OEBA and OEAB should  
be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the  
current-sinking/current-sourcing capability of the driver.  
The 74ALVCH162601 is designed with 30 Ω series resistors in both HIGH or LOW output stage.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
2. Features and benefits  
•
CMOS low power consumption  
•
•
•
•
•
•
MultiByte flow-through standard pin-out architecture  
Low inductance multiple VCC and GND pins for minimum noise and ground bounce  
Direct interface with TTL levels  
Bus hold on data inputs  
Integrated 30 Ω termination resistors.  
Complies with JEDEC standards:  
•
•
JESD8-5 (2.3 V to 2.7 V)  
JESD8B/JESD36 (2.7 V to 3.6 V)  
•
ESD protection:  
•
•
HBM ANSI/ESDA/JEDEC JS-001 exceeds 2000 V  
CDM JESD22-C101E exceeds 1000 V  
3. Ordering information  
Table 1. Ordering information  
Type number  
Package  
Temperature range  
Name  
Description  
Version  
74ALVCH162601DGG −40 °C to +85 °C  
TSSOP56  
plastic thin shrink small outline package;  
56 leads; body width 6.1 mm  
SOT364-1  
 
 
 
1234567...15

中文翻译

下载PDF

与74ALVCH162601DGG相关器件

型号 品牌 获取价格 描述 数据表
74ALVCH162601DGG,1 NXP

获取价格

 		74ALVCH162601 - 18-bit universal bus transceiver with 30 Ohm termination resistor; 3-state
74ALVCH162601DGG:1 NXP

获取价格

 		74ALVCH162601 - 18-bit universal bus transceiver with 30 Ohm termination resistor; 3-state
74ALVCH162601DGGS NXP

获取价格

 		74ALVCH162601 - 18-bit universal bus transceiver with 30 Ohm termination resistor; 3-state
74ALVCH162601DGG-T NXP

获取价格

 		IC ALVC/VCX/A SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, PLASTIC, SOT-364
74ALVCH162601DGGY NXP

获取价格

 		74ALVCH162601 - 18-bit universal bus transceiver with 30 Ohm termination resistor; 3-state
74ALVCH162601DLG4 TI

获取价格

 		18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
74ALVCH162601DLRG4 TI

获取价格

 		18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
74ALVCH162601GRE4 TI

获取价格

 		ALVC/VCX/A SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, GREEN, PLASTIC, TSS
74ALVCH162601GRG4 TI

获取价格

 		ALVC/VCX/A SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, GREEN, PLASTIC, TSS
74ALVCH16269DGGRE4 TI

获取价格

 		12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS

与74ALVCH162601DGG相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证