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74AC11378D PDF预览

74AC11378D

更新时间: 2024-11-18 02:58:19
品牌 Logo 应用领域
德州仪器 - TI 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
8页 108K
描述
HEX D-TYPE FLIP FLOP WITH ENABLE, POSITIVE EDGE TRIGGER

74AC11378D 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
Reach Compliance Code:not_compliant风险等级:5.92
Is Samacsys:NJESD-30 代码:R-PDSO-G20
逻辑集成电路类型:D FLIP-FLOP功能数量:6
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
电源:3.3/5 V认证状态:Not Qualified
子类别:FF/Latches表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL触发器类型:POSITIVE EDGE
Base Number Matches:1

74AC11378D 数据手册

 浏览型号74AC11378D的Datasheet PDF文件第2页浏览型号74AC11378D的Datasheet PDF文件第3页浏览型号74AC11378D的Datasheet PDF文件第4页浏览型号74AC11378D的Datasheet PDF文件第5页浏览型号74AC11378D的Datasheet PDF文件第6页浏览型号74AC11378D的Datasheet PDF文件第7页 
ꢇꢈꢉ ꢊꢋ ꢌꢍꢎ ꢏꢈꢊ ꢐ ꢑ ꢒꢏ ꢌ ꢐꢑ ꢓ  
SCAS150 − APRIL 1991 − REVISED APRIL 1993  
DW OR N PACKAGE  
(TOP VIEW)  
Contains Six D-Type Flip-Flops  
Clock Enable Latched to Avoid False  
Clocking  
1Q  
2Q  
3Q  
GND  
GND  
GND  
GND  
4Q  
CLKEN  
1D  
2D  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
Applications Include: Buffer/Storage  
Registers, Shift Registers, Pattern  
Generators  
3D  
Flow-Through Architecture Optimizes PCB  
V
CC  
Layout  
V
CC  
Center-Pin V  
and GND Pin Configurations  
Minimize High-Speed Switching Noise  
CC  
4D  
13 5D  
12 6D  
EPIC (Enhanced-Performance Implanted  
5Q  
6Q  
CMOS) 1-µm Process  
11  
CLK  
500-mA Typical Latch-Up Immunity at 125°C  
Package Options Include Plastic  
Small-Outline Packages, and Standard  
Plastic 300-mil DIPs  
description  
These circuits are positive-edge-triggered D-type flip-flops with a clock-enable input. Information at the D inputs  
meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse  
if the clock-enable input (CLKEN) is low.  
Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the  
positive-going pulse. When the clock inputs are at either the high or low level, the data (D) input signal has no  
effect at the output. The circuits are designed to prevent false clocking by transitions at the clock-enable  
(CLKEN) input.  
The 74AC11378 is characterized for operation from − 40°C to 85°C.  
FUNCTION TABLE  
(each flip-flop)  
INPUTS  
OUTPUT  
CLKEN  
CLK  
D
Q
H
X
X
Q
O
L
L
L
H
L
H
L
X
X
Q
O
EPIC is a trademark of Texas Instruments Incorporated.  
ꢍꢥ  
Copyright 1993, Texas Instruments Incorporated  
ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  

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