5秒后页面跳转
74AC11378N PDF预览

74AC11378N

更新时间: 2024-11-21 02:58:19
品牌 Logo 应用领域
德州仪器 - TI 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
8页 108K
描述
HEX D-TYPE FLIP FLOP WITH ENABLE, POSITIVE EDGE TRIGGER

74AC11378N 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP20,.3针数:20
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.92Is Samacsys:N
其他特性:WITH HOLD MODE系列:AC
JESD-30 代码:R-PDIP-T20长度:25.4 mm
逻辑集成电路类型:D FLIP-FLOP位数:6
功能数量:1端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP20,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3/5 V
传播延迟(tpd):14 ns认证状态:Not Qualified
座面最大高度:5.08 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:7.62 mm
最小 fmax:110 MHzBase Number Matches:1

74AC11378N 数据手册

 浏览型号74AC11378N的Datasheet PDF文件第2页浏览型号74AC11378N的Datasheet PDF文件第3页浏览型号74AC11378N的Datasheet PDF文件第4页浏览型号74AC11378N的Datasheet PDF文件第5页浏览型号74AC11378N的Datasheet PDF文件第6页浏览型号74AC11378N的Datasheet PDF文件第7页 
ꢇꢈꢉ ꢊꢋ ꢌꢍꢎ ꢏꢈꢊ ꢐ ꢑ ꢒꢏ ꢌ ꢐꢑ ꢓ  
SCAS150 − APRIL 1991 − REVISED APRIL 1993  
DW OR N PACKAGE  
(TOP VIEW)  
Contains Six D-Type Flip-Flops  
Clock Enable Latched to Avoid False  
Clocking  
1Q  
2Q  
3Q  
GND  
GND  
GND  
GND  
4Q  
CLKEN  
1D  
2D  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
Applications Include: Buffer/Storage  
Registers, Shift Registers, Pattern  
Generators  
3D  
Flow-Through Architecture Optimizes PCB  
V
CC  
Layout  
V
CC  
Center-Pin V  
and GND Pin Configurations  
Minimize High-Speed Switching Noise  
CC  
4D  
13 5D  
12 6D  
EPIC (Enhanced-Performance Implanted  
5Q  
6Q  
CMOS) 1-µm Process  
11  
CLK  
500-mA Typical Latch-Up Immunity at 125°C  
Package Options Include Plastic  
Small-Outline Packages, and Standard  
Plastic 300-mil DIPs  
description  
These circuits are positive-edge-triggered D-type flip-flops with a clock-enable input. Information at the D inputs  
meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse  
if the clock-enable input (CLKEN) is low.  
Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the  
positive-going pulse. When the clock inputs are at either the high or low level, the data (D) input signal has no  
effect at the output. The circuits are designed to prevent false clocking by transitions at the clock-enable  
(CLKEN) input.  
The 74AC11378 is characterized for operation from − 40°C to 85°C.  
FUNCTION TABLE  
(each flip-flop)  
INPUTS  
OUTPUT  
CLKEN  
CLK  
D
Q
H
X
X
Q
O
L
L
L
H
L
H
L
X
X
Q
O
EPIC is a trademark of Texas Instruments Incorporated.  
ꢍꢥ  
Copyright 1993, Texas Instruments Incorporated  
ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  

与74AC11378N相关器件

型号 品牌 获取价格 描述 数据表
74AC11379 NXP

获取价格

QUAD D- TYPE FLIP FLOP WITH DATA ENABLE
74AC11379 TI

获取价格

QUAD D- TYPE FLIP FLOP WITH DATA ENABLE
74AC11379_10 TI

获取价格

QUAD D- TYPE FLIP FLOP WITH DATA ENABLE
74AC11379D TI

获取价格

QUAD D- TYPE FLIP FLOP WITH DATA ENABLE
74AC11379D NXP

获取价格

QUAD D- TYPE FLIP FLOP WITH DATA ENABLE
74AC11379D-T YAGEO

获取价格

D Flip-Flop, AC Series, 1-Func, Positive Edge Triggered, 4-Bit, Complementary Output, CMOS
74AC11379DW TI

获取价格

Quadruple D-Type Flip-Flops With Clock Enable 20-SOIC -40 to 85
74AC11379DWR TI

获取价格

AC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO20, PLASTIC, SOI
74AC11379N NXP

获取价格

QUAD D- TYPE FLIP FLOP WITH DATA ENABLE
74AC11379N ROCHESTER

获取价格

D Flip-Flop, AC Series, 1-Func, Positive Edge Triggered, 4-Bit, Complementary Output, CMOS