5秒后页面跳转
74AC11379DW PDF预览

74AC11379DW

更新时间: 2024-11-11 14:35:35
品牌 Logo 应用领域
德州仪器 - TI 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
7页 100K
描述
Quadruple D-Type Flip-Flops With Clock Enable 20-SOIC -40 to 85

74AC11379DW 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:PLASTIC, SOIC-20针数:20
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.92Is Samacsys:N
其他特性:WITH HOLD MODE系列:AC
JESD-30 代码:R-PDSO-G20长度:12.8 mm
负载电容(CL):50 pF逻辑集成电路类型:D FLIP-FLOP
最大频率@ Nom-Sup:100000000 Hz最大I(ol):0.024 A
位数:4功能数量:1
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3/5 V传播延迟(tpd):14 ns
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:7.5 mm最小 fmax:100 MHz
Base Number Matches:1

74AC11379DW 数据手册

 浏览型号74AC11379DW的Datasheet PDF文件第2页浏览型号74AC11379DW的Datasheet PDF文件第3页浏览型号74AC11379DW的Datasheet PDF文件第4页浏览型号74AC11379DW的Datasheet PDF文件第5页浏览型号74AC11379DW的Datasheet PDF文件第6页浏览型号74AC11379DW的Datasheet PDF文件第7页 
ꢇ ꢈꢂꢉꢊ ꢉꢋꢌ ꢍꢎꢏ ꢊꢐ ꢑꢒ ꢎ ꢋꢐ ꢑꢓ  
SCAS104 − MARCH 1990 − REVISED APRIL 1993  
DW OR N PACKAGE  
(TOP VIEW)  
Contains Four Flip-Flops with Double-Rail  
Outputs  
Clock Enable Latched to Avoid False  
1Q  
2Q  
1Q  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
Clocking  
CLKEN  
1D  
Applications Include: Buffer/Storage  
Registers, Shift Registers, Pattern  
Generators  
2Q  
GND  
GND  
GND  
GND  
3Q  
2D  
V
V
CC  
CC  
Flow-Through Architecture Optimizes PCB  
Layout  
3D  
Center-Pin V  
and GND Pin  
Configurations Minimize High-Speed  
Switching Noise  
4D  
CC  
3Q  
CLK  
4Q  
4Q  
EPIC (Enhanced-Performance Implanted  
CMOS) 1-µm Process  
500-mA Typical Latch-Up Immunity at  
125°C  
Package Options Include Plastic  
Small-Outline Packages and Standard  
Plastic 300-mil DIPs  
description  
These circuits are positive-edge-triggered D-type flip-flops with a clock-enable input.  
Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the  
positive-going edge of the clock pulse if the clock-enable input (CLKEN) is low. Clock triggering occurs at a  
particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock  
input is at either the high or low level, the data (D) input signal has no effect at the output. The circuits are  
designed to prevent false clocking by transitions at the clock-enable (CLKEN) input.  
The 74AC11379 is characterized for operation from − 40°C to 85°C.  
FUNCTION TABLE  
(each flip-flop)  
INPUTS  
OUTPUTS  
CLKEN  
CLK  
X
D
X
H
L
Q
Q
H
L
Q
Q
0
0
H
L
L
L
H
X
L
X
Q
Q
0
0
EPIC is a trademark of Texas Instruments Incorporated.  
ꢌꢥ  
Copyright 1993, Texas Instruments Incorporated  
ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

与74AC11379DW相关器件

型号 品牌 获取价格 描述 数据表
74AC11379DWR TI

获取价格

AC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO20, PLASTIC, SOI
74AC11379N NXP

获取价格

QUAD D- TYPE FLIP FLOP WITH DATA ENABLE
74AC11379N ROCHESTER

获取价格

D Flip-Flop, AC Series, 1-Func, Positive Edge Triggered, 4-Bit, Complementary Output, CMOS
74AC11379N YAGEO

获取价格

D Flip-Flop, AC Series, 1-Func, Positive Edge Triggered, 4-Bit, Complementary Output, CMOS
74AC11379N TI

获取价格

QUAD D- TYPE FLIP FLOP WITH DATA ENABLE
74AC11470N YAGEO

获取价格

Registered Bus Transceiver, AC Series, 1-Func, 8-Bit, True Output, CMOS, PDIP28
74AC11471D YAGEO

获取价格

Registered Bus Transceiver, AC Series, 1-Func, 8-Bit, Inverted Output, CMOS, PDSO28
74AC11471D-T YAGEO

获取价格

Registered Bus Transceiver, AC Series, 1-Func, 8-Bit, Inverted Output, CMOS, PDSO28
74AC11471N YAGEO

获取价格

Registered Bus Transceiver, AC Series, 1-Func, 8-Bit, Inverted Output, CMOS, PDIP28
74AC11474D-T YAGEO

获取价格

Registered Bus Transceiver, AC Series, 1-Func, 9-Bit, True Output, CMOS, PDSO28