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74HC373 PDF预览

74HC373

更新时间: 2024-04-09 18:59:15
品牌 Logo 应用领域
圣邦微 - SGMICRO /
页数 文件大小 规格书
12页 625K
描述
Octal D-Type Transparent Latch with 3-State Outputs

74HC373 数据手册

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74HC373  
Octal D-Type Transparent  
Latch with 3-State Outputs  
GENERAL DESCRIPTION  
FEATURES  
The 74HC373 is an 8-bit D-type transparent latch with  
3-state outputs that is designed for 2.0V to 5.5V VCC  
operation.  
Wide Operating Voltage Range: 2.0V to 5.5V  
+7.8mA/-7.8mA Output Current  
CMOS Low Power Consumption  
3-State Non-Inverting Outputs Suitable for  
Bus-Oriented Applications  
The device is provided with a latch enable (LE) input  
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and an output enable (OE) input. When LE is set high,  
-40to +125Operating Temperature Range  
Available in Green SOIC-20 and TSSOP-20  
Packages  
data at the inputs gets access to the latches and the  
latches are transparent, the latch outputs will vary with  
corresponding data inputs. When LE is set low, the  
latches store data that appeared on the inputs for a  
setup time before the high-to-low transition of LE. When  
FUNCTION TABLE  
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OE is high, all outputs are in high-impedance state. OE  
has no influence on the state of the latches.  
CONTROL INPUT  
INPUT  
OUTPUT  
INTERNAL  
LATCHES  
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Dn  
L
LE  
H
H
L
Qn  
L
OE  
L
The clamp diodes of inputs allow the use of current  
limiting resistors to connect inputs to the voltage  
exceeding supply voltage.  
L
H
L
L
H
I
H
L
L
L
L
h
H
X
H
Z
The 74HC373 is available in Green SOIC-20 and  
TSSOP-20 packages. It operates over an ambient  
temperature range of -40to +125.  
H
X
X
H = High voltage level.  
h = High voltage level one setup time before the high-to-low  
transition of LE.  
L = Low voltage level.  
LOGIC DIAGRAM  
I = Low voltage level one setup time before the high-to-low  
transition of LE.  
D2 to D6  
D7  
D0  
D1  
Z = High-impedance state.  
X = Don’t care.  
D
D
D
LE Q  
LE Q  
LE Q  
LE  
OE  
Q0  
Q1  
Q7  
Q2 to Q6  
SG Micro Corp  
www.sg-micro.com  
NOVEMBER 2023 – REV. A  

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