5秒后页面跳转
74HC373BQ PDF预览

74HC373BQ

更新时间: 2024-11-04 12:36:51
品牌 Logo 应用领域
恩智浦 - NXP 总线驱动器总线收发器锁存器逻辑集成电路
页数 文件大小 规格书
26页 179K
描述
Octal D-type transparent latch; 3-state

74HC373BQ 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:QFN包装说明:HVQCCN, LCC20,.1X.18,20
针数:20Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.37
Is Samacsys:N系列:HC/UH
JESD-30 代码:R-PQCC-N20JESD-609代码:e4
长度:4.5 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.006 A
湿度敏感等级:1位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:HVQCCN封装等效代码:LCC20,.1X.18,20
封装形状:RECTANGULAR封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:2/6 VProp。Delay @ Nom-Sup:45 ns
传播延迟(tpd):265 ns认证状态:Not Qualified
座面最大高度:1 mm子类别:FF/Latches
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:NICKEL PALLADIUM GOLD端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:2.5 mm
Base Number Matches:1

74HC373BQ 数据手册

 浏览型号74HC373BQ的Datasheet PDF文件第2页浏览型号74HC373BQ的Datasheet PDF文件第3页浏览型号74HC373BQ的Datasheet PDF文件第4页浏览型号74HC373BQ的Datasheet PDF文件第5页浏览型号74HC373BQ的Datasheet PDF文件第6页浏览型号74HC373BQ的Datasheet PDF文件第7页 
74HC373; 74HCT373  
Octal D-type transparent latch; 3-state  
Rev. 5 — 13 December 2011  
Product data sheet  
1. General description  
The 74HC373; 74HCT373 is a high-speed Si-gate CMOS device and is pin compatible  
with Low-power Schottky TTL. It is specified in compliance with JEDEC standard no. 7A.  
The 74HC373; 74HCT373 is an octal D-type transparent latch featuring separate D-type  
inputs for each latch and 3-state outputs for bus oriented applications. A latch enable (LE)  
input and an output enable (OE) input are common to all latches.  
The 74HC373; 74HCT373 consists of eight D-type transparent latches with 3-state true  
outputs. When LE is HIGH, data at the Dn inputs enters the latches. In this condition the  
latches are transparent, i.e. a latch output will change state each time its corresponding  
D input changes.  
When LE is LOW the latches store the information that was present at the D inputs a  
set-up time preceding the HIGH-to-LOW transition of LE. When OE is LOW, the contents  
of the 8 latches are available at the outputs. When OE is HIGH, the outputs go to the high-  
impedance OFF-state. Operation of the OE input does not affect the state of the latches.  
The 74HC373; 74HCT373 is functionally identical to:  
74HC563; 74HCT563: but inverted outputs and different pin arrangement  
74HC573; 74HCT573: but different pin arrangement  
2. Features and benefits  
3-state non-inverting outputs for bus oriented applications  
Common 3-state output enable input  
Functionally identical to the 74HC563; 74HCT563 and 74HC573; 74HCT573  
ESD protection:  
HBM JESD22-A114F exceeds 2 000 V  
MM JESD22-A115-A exceeds 200 V  
Specified from 40 C to +85 C and from 40 C to +125 C  

与74HC373BQ相关器件

型号 品牌 获取价格 描述 数据表
74HC373BQ,115 NXP

获取价格

74HC(T)373 - Octal D-type transparent latch; 3-state QFN 20-Pin
74HC373BQ-Q100 NXP

获取价格

Octal D-type transparent latch; 3-state
74HC373BQ-Q100 NEXPERIA

获取价格

Octal D-type transparent latch; 3-stateProduction
74HC373BQ-Q100,115 NXP

获取价格

74HC(T)373-Q100 - Octal D-type transparent latch; 3-state QFN 20-Pin
74HC373D NXP

获取价格

Octal D-type transparent latch; 3-state
74HC373D NEXPERIA

获取价格

Octal D-type transparent latch; 3-stateProduction
74HC373D TOSHIBA

获取价格

Octal D-Type Latch, SOIC20
74HC373D,652 NXP

获取价格

74HC(T)373 - Octal D-type transparent latch; 3-state SOP 20-Pin
74HC373D,653 NXP

获取价格

74HC(T)373 - Octal D-type transparent latch; 3-state SOP 20-Pin
74HC373D/T3 NXP

获取价格

IC HC/UH SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, 7.50 MM, PLASTIC, MS-013, SOT-163-1, S