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W83194R-17A PDF预览

W83194R-17A

更新时间: 2024-11-29 22:14:35
品牌 Logo 应用领域
华邦 - WINBOND 晶体外围集成电路光电二极管时钟
页数 文件大小 规格书
21页 267K
描述
100MHZ AGP CLOCK FOR SIS CHIPSET

W83194R-17A 技术参数

生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP, SSOP48,.4针数:48
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.32
Is Samacsys:N其他特性:ALSO REQUIRES 2.5V SUPPLY
JESD-30 代码:R-PDSO-G48JESD-609代码:e3
长度:15.875 mm端子数量:48
最高工作温度:70 °C最低工作温度:
最大输出时钟频率:133.3 MHz封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP48,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
电源:2.5,3.3 V主时钟/晶体标称频率:14.318 MHz
认证状态:Not Qualified座面最大高度:2.794 mm
子类别:Clock Generators最大供电电压:3.465 V
最小供电电压:3.135 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:MATTE TIN
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL宽度:7.5 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, PROCESSOR SPECIFICBase Number Matches:1

W83194R-17A 数据手册

 浏览型号W83194R-17A的Datasheet PDF文件第2页浏览型号W83194R-17A的Datasheet PDF文件第3页浏览型号W83194R-17A的Datasheet PDF文件第4页浏览型号W83194R-17A的Datasheet PDF文件第5页浏览型号W83194R-17A的Datasheet PDF文件第6页浏览型号W83194R-17A的Datasheet PDF文件第7页 
W83194R-17/-17A  
100MHZ AGP CLOCK FOR SIS CHIPSET  
1.0 GENERAL DESCRIPTION  
The W83194R-17/-17A is a Clock Synthesizer which provides all clocks required for high-speed RISC  
or CISC microprocessor such as Intel PentiumII, PentiumPro , AMD or Cyrix. Eight different  
frequency of CPU, AGP and PCI clocks are externally selectable with smooth transitions. The  
W83194R-17/-17A provides AGP clocks especially for clone chipset. The highest CPU frequency  
provided by the W83194R-17 is up to 100MHz, but the one of W83194R-17A is up to 133MHz.  
The W83193R-17/-17A provides I2C serial bus interface to program the registers to enable or disable  
each clock outputs and choose the 0.5% or 1.5% center type spread spectrum to reduce EMI.  
The W83194R-17/-17A accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V  
supply. High drive PCI and SDRAM CLOCK outputs typically provide greater than 1 V /ns slew rate  
into 30 pF loads. CPU CLOCK outputs typically provide better than 1 V /ns slew rate into 20 pF loads  
¡ Ó  
as maintaining 50 5% duty cycle. The fixed frequency outputs as REF, 24MHz, and 48 MHz  
provide better than 0.5V /ns slew rate.  
2.0 PRODUCT FEATURES  
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Supports PentiumÔ , PentiumÔ Pro, PentiumÔ II, AMD and Cyrix CPUs with I2C.  
4 CPU clocks  
12 SDRAM clocks for 3 DIMMs  
Two AGP clocks  
6 PCI synchronous clocks.  
Optional single or mixed supply:  
(Vdd = Vddq3 = Vddq2 = Vddq2b = 3.3V) or (Vdd =Vddq2 = Vddq3 = 3.3V, Vddq2b = 2.5V)  
Skew form CPU to PCI clock -1 to 4 ns, center 2.6 ns, AGP to CPU sync. skew 0 ns (250 ps)  
Smooth frequency switch with selections from 60 MHz to 133 MHz CPU  
I2C 2-Wire serial interface and I2C read back  
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·
¡ Ó  
¡ Ó  
1.5% center type spread spectrum function to reduce EMI  
0.5% or  
Programmable registers to enable/stop each output and select modes  
(mode as Tri-state or Normal )  
MODE pin for power Management  
48 MHz for USB  
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24 MHz for super I/O  
48-pin SSOP package  
Publication Release Date: Sep. 1998  
Revision 0.20  
- 1 -  

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