Datasheet > W83194R-37

W83194R-37

更新时间： 2024-11-29 22:14:35

品牌	Logo	应用领域
华邦 - WINBOND		时钟
页数	文件大小	规格书
19页	262K
描述
100 MHZ AGP CLOCK FOR VIA CHIPSET

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中文翻译

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技术参数
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W83194R-37 技术参数

生命周期：	Obsolete	零件包装代码：	SSOP
包装说明：	SSOP, SSOP48,.4	针数：	48
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.8
其他特性：	ALSO REQUIRES 2.5V SUPPLY	JESD-30 代码：	R-PDSO-G48
JESD-609代码：	e3	长度：	15.875 mm
端子数量：	48	最高工作温度：	70 °C
最低工作温度：		最大输出时钟频率：	100 MHz
封装主体材料：	PLASTIC/EPOXY	封装代码：	SSOP
封装等效代码：	SSOP48,.4	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, SHRINK PITCH	电源：	2.5,3.3 V
主时钟/晶体标称频率：	14.318 MHz	认证状态：	Not Qualified
座面最大高度：	2.794 mm	子类别：	Clock Generators
最大供电电压：	3.465 V	最小供电电压：	3.135 V
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子面层：	MATTE TIN	端子形式：	GULL WING
端子节距：	0.635 mm	端子位置：	DUAL
宽度：	7.5 mm	uPs/uCs/外围集成电路类型：	CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches：	1

W83194R-37 数据手册

Preliminary W83194R-37/-58

100 MHZ AGP CLOCK FOR VIA CHIPSET

1.0 GENERAL DESCRIPTION

The W83194R-37/-58 is a Clock Synthesizer for VIA chipset. W83194R-37 provides all clocks

required for high-speed RISC or CISC microprocessor such as Intel PentiumPro, AMD or Cyrix. Eight

different frequencies of CPU, W83194R-58 provides all clocks required for high-speed RISC or CISC

microprocessor such as Intel PentiumII and also provides 16 different frequencies of CPU clocks by

software setting (additional register0 bit2). AGP and PCI clocks are externally selectable with smooth

transitions. The W83194R-37/-58 provides AGP clocks especially for clone chipset, and makes

SDRAM in synchronous frequency with CPU or AGP clocks.

The W83194R-37/-58 provides I²C serial bus interface to program the registers to enable or disable

each clock outputs and choose the 0.25%, 0.5% or 0.5%,1.5% center type spread spectrum to reduce

EMI.

The W83194R-37/-58 accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V supply.

High drive PCI and SDRAM CLOCK outputs typically provide greater than 1V /nS slew rate into 30 pF

loads. CPU CLOCK outputs typically provide better than 1V /nS slew rate into 20 pF loads as

maintaining 50 ±5% duty cycle. The fixed frequency outputs as REF, 24 MHz, and 48 MHz provide

better than 0.5V /nS slew rate.

2.0 FEATURES

· Supports PentiumÔ , PentiumÔ Pro, PentiumÔ II, AMD and Cyrix CPUs with I²C.

· 4 CPU clocks

· 12 SDRAM clocks for 3 DIMs

· Two AGP clocks

· 6 PCI synchronous clocks.

· Optional single or mixed supply:

(VDD = VDDq3 = VDDq2 = VDDq2b = 3.3V) or (VDD = VDDq3 = VDDq2 = 3.3V, VDDq2b = 2.5V)

· Skew form CPU to PCI clock -1 to 4 nS, center 2.6 nS, AGP to CPU sync. skew 0 nS (250 pS)

· SDRAM frequency synchronous to CPU or AGP clocks

· Smooth frequency switch with selections from 60 to 100 MHz CPU (-37) and 66 to 150 MHz (-58)

· I²C 2-Wire serial interface and I²C read back

· ±0.5% or ±1.5% (-37) and 0.25%, 0.5% (-58) center type spread spectrum to reduce EMI

· Programmable registers to enable/stop each output and select modes (mode as Tri-state or Normal)

· MODE pin for power Management

· 48 MHz for USB

· 24 MHz for super I/O

· Packaged in 48-pin SSOP

Publication Release Date: April 1999

- 1 -

Revision A1

12 3 4 5 6 7...19

中文翻译

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与W83194R-37相关器件

型号	品牌	获取价格	描述	数据表
W83194R-37/-58/-58A	ETC	获取价格	100MHz/133MHz VIA MVP3. VIA Apollo Pro Clock Gen.. 3-DIMM. with S.S.T.
W83194R-39	WINBOND	获取价格	100MHZ 3-DIMM CLOCK
W83194R-39/-39A	ETC	获取价格	100MHz/133MHz（Adding 97MHz）VIA MVP3. VIA Apol
W83194R-39A	WINBOND	获取价格	100MHZ 3-DIMM CLOCK
W83194R-58	WINBOND	获取价格	100 MHZ AGP CLOCK FOR VIA CHIPSET
W83194R-58A	WINBOND	获取价格	100MHZ AGP CLOCK FOR VIA CHIPSET
W83194R-630	WINBOND	获取价格	166MHZ CLOCK FOR SIS CHIPSET
W83194R-630/-630A	ETC	获取价格	166MHz SiS540/630 Clock Gen.. 3-DIMM. with S.S.T.
W83194R-630_07	WINBOND	获取价格	166MHZ CLOCK FOR SIS CHIPSET
W83194R-630A	WINBOND	获取价格	166MHZ CLOCK FOR SIS CHIPSET

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