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W83194R-81

更新时间： 2024-01-01 12:13:29

品牌	Logo	应用领域
华邦 - WINBOND		晶体时钟发生器微控制器和处理器外围集成电路光电二极管
页数	文件大小	规格书
18页	230K
描述
100MHZ CLOCK FOR SIS CHIPSET

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W83194R-81 技术参数

生命周期：	Obsolete	零件包装代码：	SSOP
包装说明：	SSOP, SSOP48,.4	针数：	48
Reach Compliance Code：	compliant	风险等级：	5.8
JESD-30 代码：	R-PDSO-G48	端子数量：	48
最高工作温度：	70 °C	最低工作温度：
封装主体材料：	PLASTIC/EPOXY	封装代码：	SSOP
封装等效代码：	SSOP48,.4	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, SHRINK PITCH	电源：	2.5,3.3 V
认证状态：	Not Qualified	子类别：	Clock Generators
表面贴装：	YES	温度等级：	COMMERCIAL
端子形式：	GULL WING	端子节距：	0.635 mm
端子位置：	DUAL	Base Number Matches：	1

W83194R-81 数据手册

W83194R-81

100MHZ CLOCK FOR SIS CHIPSET

1.0 GENERAL DESCRIPTION

The W83194R-81 is a Clock Synthesizer for SiS chipset. W83194R-81 provides all clocks required

for high-speed RISC or CISC microprocessor such as AMD,Cyrix,Intel Pentium and also provides 16

different frequencies of CPU clocks frequency setting. All clocks are externally selectable with

smooth transitions. The W83194R-81 makes SDRAM in synchronous or asynchronous frequency

with CPU clocks.

The W83194R-81 provides I²C serial bus interface to program the registers to enable or disable each

clock outputs and W83194R-81 provides the 0.25%, 0.5% center type spread spectrum to reduce

EMI.

The W83194R-81 accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V supply.

High drive PCI and SDRAM CLOCK outputs typically provide greater than 1 V /ns slew rate into 30

pF loads. CPU CLOCK outputs typically provide better than 1 V /ns slew rate into 20 pF loads as

maintaining 50¡ Ó 5% duty cycle. The fixed frequency outputs as REF, 24MHz, and 48 MHz provide

better than 0.5V /ns slew rate.

2.0 PRODUCT FEATURES

Supports PentiumÔ , PentiumÔ Pro, AMD and Cyrix CPUs with I²C.

3 CPU clocks

13 SDRAM clocks for 3 DIMMs

6 PCI synchronous clocks.

Optional single or mixed supply:

(Vdd = Vddq4=Vddq3 = Vddq2b = 3.3V, Vddq2=2.5V) or

(Vdd = Vddq4=Vddq3 = 3.3V, Vddq2=Vdq2b = 2.5V)

Skew form CPU to PCI clock -1 to 4 ns, center 2.6 ns

SDRAM frequency synchronous or asynchronous to CPU clocks

Smooth frequency switch with selections from 66 to 133mhz(including 90MHz)

I²C 2-Wire serial interface and I²C read back

0.25%, 0.5% center type spread spectrum to reduce EMI

Programmable registers to enable/stop each output and select modes

(mode as Tri-state or Normal )

MODE pin for power Management

48 MHz for USB

24 MHz for super I/O

48-pin SSOP package

Publication Release Date: Dec. 1998

Revision 0.20

- 1 -

12 3 4 5 6 7...18

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