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W83194BR-KX PDF预览

W83194BR-KX

更新时间: 2024-11-29 22:14:35
品牌 Logo 应用领域
华邦 - WINBOND 晶体外围集成电路光电二极管时钟
页数 文件大小 规格书
12页 169K
描述
STEP-LESS 3-DIMM K7 CLOCK

W83194BR-KX 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SSOP包装说明:SSOP-48
针数:48Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.87Is Samacsys:N
其他特性:ALSO REQUIRES 2.5V SUPPLYJESD-30 代码:R-PDSO-G48
JESD-609代码:e0长度:15.875 mm
端子数量:48最高工作温度:70 °C
最低工作温度:最大输出时钟频率:166 MHz
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP48,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):240
电源:2.5/3.3,3.3 V主时钟/晶体标称频率:14.318 MHz
认证状态:Not Qualified座面最大高度:2.794 mm
子类别:Clock Generators最大供电电压:3.465 V
最小供电电压:3.135 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:7.5 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches:1

W83194BR-KX 数据手册

 浏览型号W83194BR-KX的Datasheet PDF文件第2页浏览型号W83194BR-KX的Datasheet PDF文件第3页浏览型号W83194BR-KX的Datasheet PDF文件第4页浏览型号W83194BR-KX的Datasheet PDF文件第5页浏览型号W83194BR-KX的Datasheet PDF文件第6页浏览型号W83194BR-KX的Datasheet PDF文件第7页 
W83194BR-KX  
STEP-LESS 3-DIMM K7 CLOCK  
1.0 GENERAL DESCRIPTION  
The W83194BR-KX is a Clock Synthesizer which provides all clocks required for AMD K7.  
W83194BR-KX provides 64 CPU/PCI frequencies which are selectable with smooth transitions by  
hardware or software. W83194BR-KX also provides 13 SDRAM clocks controlled by the none-delay  
buffer_in pin.  
The W83194BR-KX provides step-less frequency programming by controlling the VCO freq. and the  
programmable PCI clock output divisor ratio. A watchdog timer is quipped and when time out, the  
RESET# pin will output 4ms pulse signal.  
The W83194BR-KX accepts a 14.318 MHz reference crystal as its input. Spread spectrum built in at  
±0.5% or ±0.25% to reduce EMI. Programmable stopping individual clock outputs and frequency  
selection through I2C interface. The device meets the Pentium power-up stabilization, which requires  
CPU and PCI clocks be stable within 2 ms after power-up. Using dual function pin for the slots (ISA,  
PCI, CPU, DIMM) is not recommend.  
2.0 PRODUCT FEATURES  
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Supports AMD CPU with I2C.  
3 CPU clocks (one free-running chipset clock controlled by I2C)  
13 SDRAM clocks for 3 DIMMs  
6 PCI synchronous clocks  
One IOAPIC clock for multiprocessor support  
Optional single or mixed supply:  
(Vddq1=Vddq2 = Vddq3 = Vddq4 = VddL1 =VddL2= 3.3V) or (Vddq1= Vddq2 = Vddq3=Vddq4 =  
3.3V, VddL1 = VdqL2 = 2.5V)  
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< 250ps skew among CPU and SDRAM clocks  
< 250ps skew among PCI clocks  
< 5ns propagation delay SDRAM from buffer input  
Skew from CPU (earlier) to PCI clock 1 to 4ns, center 2.6ns.  
Smooth frequency switch with selections from 66 MHz to 200 MHz CPU  
Stepless frequency programming by controlling the VCO freq. and the clock output divisor ratio  
Programmable skew and driving strength for CPU and SDRAM clock outputs  
I2C 2-Wire serial interface and I2C read back  
±0.25% or ±0.5% spread spectrum function to reduce EMI  
Programmable registers to enable/stop each output and select modes  
MODE pin for power Management and RESET# out when system hang  
One 48 MHz for USB & one 24 MHz for super I/O  
48-pin SSOP package  
Publication Release Date: May 2000  
- 1 -  
Revision 0.42  

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