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W40S01-04HT PDF预览

W40S01-04HT

更新时间: 2024-11-16 20:11:11
品牌 Logo 应用领域
芯科 - SILICON 光电二极管
页数 文件大小 规格书
11页 193K
描述
Low Skew Clock Driver, W40S Series, 18 True Output(s), 0 Inverted Output(s), CMOS, PDSO48, 0.300 INCH, SSOP-48

W40S01-04HT 技术参数

生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP,针数:48
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.47系列:W40S
输入调节:STANDARDJESD-30 代码:R-PDSO-G48
JESD-609代码:e0长度:15.875 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER湿度敏感等级:1
功能数量:1反相输出次数:
端子数量:48实输出次数:18
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):220
传播延迟(tpd):5 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.25 ns座面最大高度:2.794 mm
最大供电电压 (Vsup):3.465 V最小供电电压 (Vsup):3.135 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.5 mm
最小 fmax:133 MHzBase Number Matches:1

W40S01-04HT 数据手册

 浏览型号W40S01-04HT的Datasheet PDF文件第2页浏览型号W40S01-04HT的Datasheet PDF文件第3页浏览型号W40S01-04HT的Datasheet PDF文件第4页浏览型号W40S01-04HT的Datasheet PDF文件第5页浏览型号W40S01-04HT的Datasheet PDF文件第6页浏览型号W40S01-04HT的Datasheet PDF文件第7页 
1W40S01-04  
W40S01-04  
SDRAM Buffer - 4 DIMM  
Features  
Key Specifications  
• Eighteen skew controlled CMOS outputs (SDRAM0:17)  
• Supports four SDRAM DIMMs  
• Ideal for high-performance systems designed around  
Intel®’s 440BX chip set  
• SMBus serial configuration interface  
• Output skew between any two outputs is less than  
250 ps  
• 1 to 5 ns propagation delay  
• DC to 133-MHz operation  
• Single 3.3V supply voltage  
• Low power CMOS design packaged in a 48-pin SSOP  
(Small Shrink Outline Package)  
Supply Voltages:..................................... VDDQ3 = 3.3V ± 5%  
Operating Temperature:.................................... 0°C to +70°C  
Input Threshold: ..................................................1.5V typical  
Maximum Input Voltage:...................................VDDQ3 + 0.5V  
Input Frequency:............................................... 0 to 133 MHz  
BUF_IN to SDRAM0:17 Propagation Delay: ......1.0 to 5.0 ns  
Output Edge Rate:.................................................. >1.5 V/ns  
Output Skew:............................................................ ±250 ps  
Output Duty Cycle: .................................. 45/55% worst case  
Output Impedance:...............................................15typical  
Output Type: ................................................CMOS rail-to-rail  
Part to Part Skew:........................................................700 ps  
Overview  
The Cypress W40S01-04 is a low-voltage, eighteen-output  
signal buffer. Output buffer impedance is approximately 15Ω  
which is ideal for driving SDRAM DIMMs.  
Pin Configuration  
Block Diagram  
SDATA  
SCLOCK  
Serial Port  
Device Control  
OE  
SSOP  
SDRAM0  
NC  
NC  
VDDQ3  
SDRAM0  
SDRAM1  
GND  
VDDQ3  
SDRAM2  
SDRAM3  
GND  
BUF_IN  
VDDQ3  
SDRAM4  
SDRAM5  
GND  
VDDQ3  
SDRAM6  
SDRAM7  
GND  
VDDQ3  
SDRAM16  
GND  
1
2
3
4
5
6
7
8
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
NC  
NC  
SDRAM1  
SDRAM2  
SDRAM3  
SDRAM4  
SDRAM5  
SDRAM6  
VDDQ3  
SDRAM15  
SDRAM14  
GND  
VDDQ3  
SDRAM13  
SDRAM12  
GND  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
[1]  
OE  
SDRAM7  
SDRAM8  
SDRAM9  
VDDQ3  
SDRAM11  
SDRAM10  
GND  
VDDQ3  
SDRAM9  
SDRAM8  
GND  
VDDQ3  
SDRAM17  
GND  
GND  
SCLOCK  
BUF_IN  
SDRAM10  
SDRAM11  
SDRAM12  
SDRAM13  
SDRAM14  
SDRAM15  
SDRAM16  
SDRAM17  
VDDQ3  
[1]  
[1]  
SDATA  
Note:  
1. Internal pull-up resistor of 250K on SDATA, SCLOCK, and OE  
inputs (not CMOS level).  
Intel is a registered trademark of Intel Corporation.  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
April 5, 2001  

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