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W40S11-02H PDF预览

W40S11-02H

更新时间: 2024-11-16 03:17:43
品牌 Logo 应用领域
SPECTRALINEAR 逻辑集成电路光电二极管驱动动态存储器手机
页数 文件大小 规格书
9页 129K
描述
SDRAM Buffer - 2 DIMM (Mobile)

W40S11-02H 数据手册

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W40S11-02  
SDRAM Buffer - 2 DIMM (Mobile)  
Key Specifications  
Features  
• Ten skew-controlled CMOS outputs (SDRAM0:9)  
• Supports two SDRAM DIMMs  
Supply Voltages:...........................................VDD = 3.3V 5ꢀ  
Operating Temperature:.................................... 0°C to +70°C  
Input Threshold:...................................................1.5V typical  
Maximum Input Voltage: ...................................... VDD + 0.5V  
Input Frequency:...............................................0 to 133 MHz  
BUF_IN to SDRAM0:9 Propagation Delay:........ 1.0 to 5.0 ns  
Output Edge Rate:................................................. >1.5 V/ns  
Output Skew: ............................................................ 250 ps  
Output Duty Cycle:...................................45/55ꢀ worst case  
Output Impedance: ....................................... 15 ohms typical  
Output Type: ............................................... CMOS rail-to-rail  
• Ideal for high-performance systems designed around  
Intel®’s latest mobile chip set  
• SMBus serial configuration interface  
• Skew between any two outputs is less than 250 ps  
• 1 to 5 ns propagation delay  
• DC to 133-MHz operation  
• Single 3.3V supply voltage  
• Low power CMOS design packaged in a 28-pin, 209-mil  
SSOP (Shrink Small Outline Package)  
Overview  
The Cypress W40S11-02 is a low-voltage, ten-output clock  
buffer. Output buffer impedance is approximately 15:, which  
is ideal for driving SDRAM DIMMs.  
Pin Configuration  
Block Diagram  
SDATA  
Serial Port  
Device Control  
VDD  
SDRAM0  
SDRAM1  
GND  
1
2
3
4
5
6
7
8
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
VDD  
SCLOCK  
SDRAM7  
SDRAM6  
GND  
OE  
SDRAM0  
SDRAM1  
SDRAM2  
SDRAM3  
SDRAM4  
SDRAM5  
SDRAM6  
VDD  
VDD  
SDRAM2  
SDRAM3  
GND  
BUF_IN  
VDD  
SDRAM8  
GND  
VDD  
SDRAM5  
SDRAM4  
GND  
9
OE  
VDD  
[1]  
10  
11  
12  
13  
14  
SDRAM9  
GND  
GND  
SDATA  
[1]  
SCLOCK  
[1]  
SDRAM7  
SDRAM8  
SDRAM9  
BUF_IN  
Note:  
1. Internal pull-up resistor of 250K on SDATA, SCLOCK, and OE in-  
puts (should not be relied upon for pulling up to V ).  
DD  
Rev 1.0, Dec. 01, 2006  
2200 Laurelwood Road, Santa Clara, CA 95054  
Page 1 of 9  
Tel:(408) 855-0555 Fax:(408) 855-0550  
www.SpectraLinear.com  

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