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W40S11 PDF预览

W40S11

更新时间: 2024-11-15 22:14:47
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 动态存储器手机
页数 文件大小 规格书
11页 170K
描述
SDRAM Buffer - 2 DIMM (Mobile)

W40S11 数据手册

 浏览型号W40S11的Datasheet PDF文件第2页浏览型号W40S11的Datasheet PDF文件第3页浏览型号W40S11的Datasheet PDF文件第4页浏览型号W40S11的Datasheet PDF文件第5页浏览型号W40S11的Datasheet PDF文件第6页浏览型号W40S11的Datasheet PDF文件第7页 
W40S11-02  
SDRAM Buffer - 2 DIMM (Mobile)  
Features  
Key Specifications  
• Ten skew-controlled CMOS outputs (SDRAM0:9)  
• Supports two SDRAM DIMMs  
Supply Voltages:........................................... V = 3.3V±5%  
DD  
Operating Temperature:.................................... 0°C to +70°C  
Input Threshold: .................................................. 1.5V typical  
• Ideal for high-performance systems designed around  
Intel®’s latest Mobile chip set  
2
Maximum Input Voltage:.......................................V + 0.5V  
DD  
• I C Serial configuration interface  
Input Frequency:............................................... 0 to 133 MHz  
BUF_IN to SDRAM0:9 Propagation Delay: ........1.0 to 5.0 ns  
Output Edge Rate:................................................. >1.5 V/ns  
Output Skew:............................................................ ±250 ps  
Output Duty Cycle: .................................. 45/55% worst case  
Output Impedance:........................................15 ohms typical  
Output Type:................................................ CMOS rail-to-rail  
• Skew between any two outputs is less than 250 ps  
• 1 to 5 ns propagation delay  
• DC to 133-MHz operation  
• Single 3.3V supply voltage  
• Low power CMOS design packaged in a 28-pin, 209-mil  
SSOP (Shrink Small Outline Package)  
Overview  
The Cypress W40S11-02 is a low-voltage, ten-output clock  
buffer. Output buffer impedance is approximately 15, which  
is ideal for driving SDRAM DIMMs.  
Pin Configuration  
Block Diagram  
SDATA  
SCLOCK  
Serial Port  
Device Control  
VDD  
SDRAM0  
SDRAM1  
GND  
1
2
3
4
5
6
7
8
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
VDD  
SDRAM7  
SDRAM6  
GND  
OE  
SDRAM0  
SDRAM1  
VDD  
VDD  
SDRAM2  
SDRAM3  
GND  
BUF_IN  
VDD  
SDRAM5  
SDRAM4  
GND  
SDRAM2  
SDRAM3  
SDRAM4  
SDRAM5  
SDRAM6  
[1]  
9
OE  
10  
11  
12  
13  
14  
VDD  
SDRAM9  
GND  
GND  
SCLOCK  
SDRAM8  
GND  
VDD  
[1]  
[1]  
SDATA  
SDRAM7  
SDRAM8  
SDRAM9  
BUF_IN  
Note:  
1. Internal pull-up resistor of 250K on SDATA, SCLOCK, and OE  
inputs (should not be relied upon for pulling up to VDD).  
Intel is a registered trademark of Intel Corporation.  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
September 29, 1999, rev. **  

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