5秒后页面跳转
捷配首页

Datasheet > TMS320C6424AZWT400
TMS320C6424AZWT400 PDF预览

TMS320C6424AZWT400

更新时间： 2024-11-23 15:54:47
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
239页 2017K
描述
IC,DSP,32-BIT,CMOS,BGA,361PIN,PLASTIC

阅读下载

中文翻译

获取价格

TMS320C6424AZWT400 技术参数

是否Rohs认证： 符合生命周期：Obsolete
包装说明：FBGA, BGA361,19X19,32Reach Compliance Code：unknown
风险等级：5.84位大小：32
格式：FIXED POINTJESD-30 代码：S-PBGA-B361
端子数量：361最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：FBGA封装等效代码：BGA361,19X19,32
封装形状：SQUARE封装形式：GRID ARRAY, FINE PITCH
电源：1.1,1.8,3.3 V认证状态：Not Qualified
RAM（字数）：20480子类别：Digital Signal Processors
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子形式：BALL
端子节距：0.8 mm端子位置：BOTTOM
Base Number Matches：1

TMS320C6424AZWT400 数据手册

 浏览型号TMS320C6424AZWT400的Datasheet PDF文件第2页浏览型号TMS320C6424AZWT400的Datasheet PDF文件第3页浏览型号TMS320C6424AZWT400的Datasheet PDF文件第4页浏览型号TMS320C6424AZWT400的Datasheet PDF文件第5页浏览型号TMS320C6424AZWT400的Datasheet PDF文件第6页浏览型号TMS320C6424AZWT400的Datasheet PDF文件第7页 
TMS320C6424  
Fixed-Point Digital Signal Processor  
www.ti.com  
SPRS347–MARCH 2007  
1 TMS320C6424 Fixed-Point Digital Signal Processor  
1.1 Features  
[Flexible Allocation]  
1M-Bit (128K-Byte) L2 Unified Mapped  
RAM/Cache [Flexible Allocation]  
•
High-Performance Digital Signal Processor  
(C6424)  
–
–
–
–
–
–
–
2.5-, 2-, 1.67-ns Instruction Cycle Time  
400-, 500-, 600-MHz C64x+™ Clock Rate  
Eight 32-Bit C64x+ Instructions/Cycle  
3200, 4000, 4800 MIPS  
Fully Software-Compatible With C64x  
Commercial and Extended Temperature  
Ranges  
•
•
Endianess: Supports Both Little Endian and  
Big Endian  
External Memory Interfaces (EMIFs)  
–
32-Bit DDR2 SDRAM Memory Controller  
With 256M-Byte Address Space (1.8-V I/O)  
Asynchronous 16-Bit Wide EMIF (EMIFA)  
With up to 128M-Byte Address Reach  
–
•
VelociTI.2™ Extensions to VelociTI™  
Advanced Very-Long-Instruction-Word (VLIW)  
TMS320C64x+™ DSP Core  
•
Flash Memory Interfaces  
•
•
NOR (8-/16-Bit-Wide Data)  
NAND (8-/16-Bit-Wide Data)  
–
Eight Highly Independent Functional Units  
With VelociTI.2 Extensions:  
•
•
Enhanced Direct-Memory-Access (EDMA)  
Controller (64 Independent Channels)  
•
Six ALUs (32-/40-Bit), Each Supports  
Single 32-Bit, Dual 16-Bit, or Quad 8-Bit  
Arithmetic per Clock Cycle  
Two 64-Bit General-Purpose Timers (Each  
Configurable as Two 32-Bit Timers)  
•
Two Multipliers Support Four 16 x 16-Bit  
Multiplies (32-Bit Results) per Clock  
Cycle or Eight 8 x 8-Bit Multiplies (16-Bit  
Results) per Clock Cycle  
•
•
One 64-Bit Watch Dog Timer  
Two UARTs (One with RTS and CTS Flow  
Control)  
–
Load-Store Architecture With Non-Aligned  
Support  
64 32-Bit General-Purpose Registers  
Instruction Packing Reduces Code Size  
All Instructions Conditional  
•
•
Master/Slave Inter-Integrated Circuit (I2C  
Bus™)  
–
–
–
–
Two Multichannel Buffered Serial Ports  
(McBSPs)  
–
–
–
–
–
–
I2S and TDM  
AC97 Audio Codec Interface  
SPI  
Standard Voice Codec Interface (AIC12)  
Telecom Interfaces – ST-Bus, H-100  
128 Channel Mode  
Additional C64x+™ Enhancements  
•
•
Protected Mode Operation  
Exceptions Support for Error Detection  
and Program Redirection  
•
Hardware Support for Modulo Loop  
Auto-Focus Module Operation  
•
Multichannel Audio Serial Port (McASP0)  
Four Serializers and SPDIF (DIT) Mode  
•
C64x+ Instruction Set Features  
–
–
–
–
–
–
–
Byte-Addressable (8-/16-/32-/64-Bit Data)  
8-Bit Overflow Protection  
Bit-Field Extract, Set, Clear  
Normalization, Saturation, Bit-Counting  
VelociTI.2 Increased Orthogonality  
C64x+ Extensions  
•
•
16-Bit Host-Port Interface (HPI)  
32-Bit 33-MHz, 3.3-V Peripheral Component  
Interconnect (PCI) Master/Slave Interface  
Conforms to PCI Specification 2.3  
•
10/100 Mb/s Ethernet MAC (EMAC)  
–
–
IEEE 802.3 Compliant  
Supports Multiple Media Independent  
Interfaces (MII, RMII)  
•
•
Compact 16-bit Instructions  
Additional Instructions to Support  
Complex Multiplies  
–
Management Data Input/Output (MDIO)  
Module  
•
C64x+ L1/L2 Memory Architecture  
–
256K-Bit (32K-Byte) L1P Program  
RAM/Cache [Flexible Allocation]  
640K-Bit (80K-Byte) L1D Data RAM/Cache  
•
•
VLYNQ™ Interface (FPGA Interface)  
Three Pulse Width Modulator (PWM) Outputs  
–
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this document.  
All trademarks are the property of their respective owners.  
PRODUCT PREVIEW information concerns products in the  
formative or design phase of development. Characteristic data and  
other specifications are design goals. Texas Instruments reserves  
the right to change or discontinue these products without notice.  
Copyright © 2007, Texas Instruments Incorporated  
1234567...239

中文翻译

下载PDF

与TMS320C6424AZWT400相关器件

型号 品牌 获取价格 描述 数据表
TMS320C6424AZWT500 TI

获取价格

 		IC,DSP,32-BIT,CMOS,BGA,361PIN,PLASTIC
TMS320C6424AZWT600 TI

获取价格

 		IC,DSP,32-BIT,CMOS,BGA,361PIN,PLASTIC
TMS320C6424Q TI

获取价格

 		C64x+ 定点 DSP- 高达 600MHz、16/8 位 EMIFA、32/16 位
TMS320C6424ZDU4 TI

获取价格

 		TMS320C6424 Fixed-Point Digital Signal Processor
TMS320C6424ZDU400 TI

获取价格

 		IC,DSP,32-BIT,CMOS,BGA,376PIN,PLASTIC
TMS320C6424ZDU5 TI

获取价格

 		TMS320C6424 Fixed-Point Digital Signal Processor
TMS320C6424ZDU500 TI

获取价格

 		IC,DSP,32-BIT,CMOS,BGA,376PIN,PLASTIC
TMS320C6424ZDU6 TI

获取价格

 		TMS320C6424 Fixed-Point Digital Signal Processor
TMS320C6424ZDU600 TI

获取价格

 		IC,DSP,32-BIT,CMOS,BGA,376PIN,PLASTIC
TMS320C6424ZDU7 TI

获取价格

 		TMS320C6424 Fixed-Point Digital Signal Processor

与TMS320C6424AZWT400相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证