Datasheet > TIP35A_05

TIP35A_05

更新时间： 2024-02-04 10:48:28

品牌	Logo	应用领域
安森美 - ONSEMI		晶体晶体管
页数	文件大小	规格书
6页	81K
描述
Complementary Silicon High?Power Transistors

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中文翻译

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数据手册

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TIP35A_05 数据手册

TIP35A, TIP35B, TIP35C

(NPN); TIP36A, TIP36B,

TIP36C (PNP)

TIP35B, TIP35C, TIP36B, and TIP36C are Preferred Devices

Complementary Silicon

High−Power Transistors

http://onsemi.com

Designed for general−purpose power amplifier and switching

applications.

25 AMPERE

Features

COMPLEMENTARY SILICON

POWER TRANSISTORS

60−100 VOLTS, 125 WATTS

• 25 A Collector Current

• Low Leakage Current −

= 1.0 mA @ 30 and 60 V

CEO

• Excellent DC Gain −

= 40 Typ @ 15 A

• High Current Gain Bandwidth Product −

⎪h ⎪= 3.0 min @ I

= 1.0 A, f = 1.0 MHz

• Pb−Free Packages are Available*

SOT−93 (TO−218)

CASE 340D

STYLE 1

MAXIMUM RATINGS

TIP35A TIP35B TIP35C

TIP36A TIP36B TIP36C

Rating

Symbol

Unit

Vdc

Adc

Collector − Emitter Voltage

Collector − Base Voltage

Emitter − Base Voltage

Collector Current

100

CEO

5.0

MARKING DIAGRAM

− Continuous

− Peak (Note 1)

Base Current − Continuous

Total Power Dissipation

5.0

Adc

125

AYWWG

TIP3xx

@ T = 25_C

Derate above 25_C

W/_C

Operating and Storage

Junction Temperature Range

T , T

−65 to +150

stg

Unclamped Inductive Load

THERMAL CHARACTERISTICS

= Assembly Location

= Year

Characteristic

Symbol

Max

Unit

= Work Week

Thermal Resistance,

Junction−to−Case

1.0

°C/W

TIP3xx = Device Code

= 5A, 5B, 5C

6A, 6B, 6C

= Pb−Free Package

Junction−To−Free−Air

Thermal Resistance

35.7

°C/W

Maximum ratings are those values beyond which device damage can occur.

Maximum ratings applied to the device are individual stress limit values (not

normal operating conditions) and are not valid simultaneously. If these limits are

exceeded, device functional operation is not implied, damage may occur and

reliability may be affected.

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 2 of this data sheet.

1. Pulse Test: Pulse Width = 10 ms, Duty Cycle v 10%.

Preferred devices are recommended choices for future use

and best overall value.

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

Semiconductor Components Industries, LLC, 2005

Publication Order Number:

September, 2005 − Rev. 5

TIP35A/D

12 3 4 5 6

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