Datasheet > SY89809AL

SY89809AL

更新时间： 2024-11-06 14:54:27

品牌	Logo	应用领域
美国微芯 - MICROCHIP		/
页数	文件大小	规格书
8页	285K
描述
The SY89809AL is a high-performance bus clock driver with nine differential High-Speed Transceiver

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

SY89809AL 数据手册

SY89809AL

3.3V LVPECL/HSTL to HSTL 1:9 High-

Performance Clock Driver with LVTTL

Clock Select and Enable

General Description

The SY89809AL is a high-performance bus clock driver

with nine differential High-Speed Transceiver Logic (HSTL)

output pairs. The part is designed for use in low-voltage

(3.3V/1.8V) applications, which require a large number of

outputs to drive precisely aligned, ultra-low skew signals to

their destination. The input is multiplexed from either HSTL

or Low-Voltage Positive-Emitter-Coupled Logic (LVPECL)

by the CLK_SEL pin. The Output Enable (OE) is

synchronous so that the outputs will only be

enabled/disabled when they are already in the LOW state.

This avoids any chance of generating a runt clock pulse

when the device is enabled/disabled as can happen with

an asynchronous control.

Precision Edge^®

Features

• 3.3V core supply, 1.8V output supply for reduced power

• LVPECL and HSTL inputs

• Nine differential HSTL (low-voltage swing) output pairs

• HSTL outputs drive 50Ω-to-ground with no offset voltage

• 750MHz maximum clock frequency

• Low part-to-part skew (100ps typical)

• Low pin-to-pin skew (15ps typical)

• Available in 32-pin TQFP

The SY89809AL features low pin-to-pin skew (15ps

typical) and low part-to-part skew (100ps typical). The

SY89809AL is available in a single space-saving package,

enabling a lower overall cost solution.

Applications

• High-performance PCs

• Workstations

• Parallel processor-based systems

• Other high-performance computing

• Communications

Datasheets and support documentation can be found on

Micrel’s web site at: www.micrel.com.

Block Diagram

Level

Direction Signal

HSTL

Input

Output

Input

HSTL_CLK, /HSTL_CLK

HSTL

Q0 – Q8, /Q0 – /Q8

LVPECL

LVCMOS/LVTTL

LVPECL_CLK, /LVPECL_CLK

CLK_SEL, OE

Table 1. Signal Groups

OE⁽¹⁾CLK_SEL

Q0 – Q8

LOW

/Q0 – /Q8

HIGH

LOW

HIGH

HSTL_CLK

/HSTL_CLK

LVPECL_CLK /LVPECL_CLK

Table 2. Truth Table

Note:

1. The OE (output enable) signal is synchronized with the low level of

the HSTL_CLK and LVPECL_CLK signal.

Precision Edge is a registered trademark of Micrel, Inc.

Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com

M9999-070110

July 2010

hbwhelp@micrel.com or (408) 955-1690

12 3 4 5 6 7 8

中文翻译

下载PDF

与SY89809AL相关器件

型号	品牌	获取价格	描述	数据表
SY89809ALTZ	MICROCHIP	获取价格	89809 SERIES, LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
SY89809ALTZTR	MICREL	获取价格	89809 SERIES, LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, LEAD
SY89809ALTZ-TR	MICROCHIP	获取价格	89809 SERIES, LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
SY89809L	MICREL	获取价格	3.3V 1:9 HIGH-PERFORMANCE, LOW-VOLTAGE BUS CLOCK DRIVER
SY89809L_05	MICREL	获取价格	3.3V 1:9 HIGH-PERFORMANCE, LOW-VOLTAGE BUS CLOCK DRIVER
SY89809L_09	MICREL	获取价格	3.3V 1:9 High-Performance, Low-Voltage Bus Clock Driver
SY89809LHH	MICROCHIP	获取价格	IC,1:9 OUTPUT, DIFFERENTIAL,TQFP,32PIN,PLASTIC
SY89809LHH-TR	MICROCHIP	获取价格	LOW SKEW CLOCK DRIVER
SY89809LTC	MICREL	获取价格	3.3V 1:9 HIGH-PERFORMANCE, LOW-VOLTAGE BUS CLOCK DRIVER
SY89809LTC	MICROCHIP	获取价格	Low Skew Clock Driver

与SY89809AL相关文章

英伟达新AI芯片Rubin或提前半年亮相
2024-11-05

13
苹果iPhone 17将全系采用三星/LG显示LTPO OLED面板
2024-11-05

9
三星深化印度制造布局，供应链本地化进程加速
2024-10-29

35
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

31

产品中心

服务支持

精选活动

关于我们

帮助中心

SY89809AL

SY89809AL 数据手册

与SY89809AL相关器件

与SY89809AL相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

SY89809AL

SY89809AL 数据手册

与SY89809AL相关器件

与SY89809AL相关文章

您还可以找

您在本页遇到什么问题？