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SY100S391JC

更新时间： 2024-11-05 22:25:23

品牌	Logo	应用领域
麦瑞 - MICREL		锁存器接口集成电路
页数	文件大小	规格书
6页	113K
描述
LOW-POWER HEX TTL-TO-PECL TRANSLATOR

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中文翻译

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数据手册

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SY100S391JC 数据手册

LOW-POWER

SY100S391

HEX TTL-TO-PECL

TRANSLATOR

FEATURES

DESCRIPTION

The SY100S391 is a hex TTL-to-PECL translator for

converting TTL logic levels to 100K logic levels. The unique

feature of this translator is the ability to do this translation

using only one +5V supply. The differential outputs allow

eachcircuittobeusedasaninverting/non-invertingtranslator,

or as a differential line driver. A common enable (E), when

LOW, holds all inverting outputs HIGH and all non-inverting

inputs LOW.

■ Operates from a single +5V supply

■ Differential PECL outputs

■ Function and pinout compatible with Fairchild F100K

■ Available in 24-pin CERPACK and 28-pin PLCC

packages

The SY100S391 is ideal for those mixed PECL/TTL

applications which only have a +5V supply available. When

used in the differential mode, the S391, due to its high

common mode rejection, overcomes voltage gradients

between the TTL and PECL ground systems.

BLOCK DIAGRAM

PIN CONFIGURATIONS

11 10 9

8 7 6 5

GND TTL

GND PECL

GNDS

CCA

Top View

PLCC

J28-1

GND PECL

19 20 21 22 23 24 25

24 23 22 21 20 19

Top View

Flatpack

F24-1

PIN NAMES

D0 — D5

Q0 — Q5

Function

Data Inputs (TTL)

Data Outputs (PECL)

9 10 11 12

Inverting Data Outputs (PECL)

Enable Input (TTL)

VCCA

VCCO for ECL Outputs

Rev.: G

Amendment:/0

Issue Date: July, 1999

12 3 4 5 6

中文翻译

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