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SY100S371JCTR

更新时间： 2024-09-14 22:33:07

品牌	Logo	应用领域
麦瑞 - MICREL		复用器输入元件
页数	文件大小	规格书
6页	107K
描述
TRIPLE 4-INPUT MULTIPLEXER WITH ENABLE

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中文翻译

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数据手册

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SY100S371JCTR 数据手册

TRIPLE 4-INPUT

MULTIPLEXER

WITH ENABLE

SY100S371

DESCRIPTION

FEATURES

■ Max. propagation delay of 1000ps

■ IEE min. of –68mA

The SY100S371 is an ultra-fast triple 4-input multiplexer

with true and complementary outputs designed for use in

high-performance ECL systems. The multiplexer is

controlled by common select inputs S0 and S1. A logic

HIGH on the Enable (E) control input takes the outputs to

a logic LOW. The inputs on the device have 75KΩ pull-

down resistors.

■ Industry standard 100K ECL levels

■ Extended supply voltage option:

VEE = –4.2V to –5.5V

■ Voltage and temperature compensation for improved

noise immunity

■ Internal 75KΩ input pull-down resistors

■ 40% faster than Fairchild

PIN CONFIGURATIONS

■ 40% lower power than Fairchild

■ Function and pinout compatible with Fairchild F100K

11 10 9

8 7 6 5

■ Available in 24-pin CERPACK and 28-pin PLCC

packages

VEE

VEES

VCCA

VCC

Top View

PLCC

J28-1

I0b

BLOCK DIAGRAM

I1b

19 20 21 22 23 24 25

24 23 22 21 20 19

Top View

Flatpack

F24-1

9 10 11 12

Rev.: G

Amendment:/0

Issue Date: July, 1999

12 3 4 5 6

中文翻译

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