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SY100EL90VZI PDF预览

SY100EL90VZI

更新时间: 2024-11-30 07:17:11
品牌 Logo 应用领域
麦瑞 - MICREL 转换器电平转换器驱动程序和接口接口集成电路光电二极管
页数 文件大小 规格书
5页 59K
描述
5V/3.3V TRIPLE ECL/LVECL-TOPECL/LVPECL TRANSLATOR

SY100EL90VZI 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP20,.4
针数:20Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.47其他特性:REQUIRES +5V & -5V SUPPLY FOR ECL-TO-PECL TRANSLATION
最大延迟:0.66 ns接口集成电路类型:ECL TO PECL TRANSLATOR
JESD-30 代码:R-PDSO-G20JESD-609代码:e0
长度:12.83 mm湿度敏感等级:1
标称负供电电压:-3.3 V位数:1
功能数量:3端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):240电源:-3.3/-5,3.3/5 V
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:Level Translators最大压摆率:26 mA
最大供电电压:3.8 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:ECL温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:7.52 mm
Base Number Matches:1

SY100EL90VZI 数据手册

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5V/3.3V TRIPLE ECL/LVECL-TO-  
PECL/LVPECL TRANSLATOR  
SY100EL90V  
FEATURES  
DESCRIPTION  
3.3V and 5V power supply options  
500ps propagation delay  
The SY100EL90V is a triple ECL/LVECL-to-PECL/  
LVPECL translator. The device can translate over all  
combinations of supply voltages: -5V ECL to 5V PECL,  
-5V ECL to 3.3V LVPECL, -3.3V LVECL to 5V PECL or  
-3.3V LVECL to 3.3V LVPECL.  
A VBB output is provided for interfacing with single  
ended ECL signals at the input. If a single ended input is  
to be used, the VBB output should be connected to the D  
input. The active signal would then drive the D input.  
When used, the VBB output should be bypassed to via a  
0.01µF capacitor. The VBB output is designed to act as  
the switching reference for the EL90V under single ended  
input switching conditions. As a result this pin can only  
source/sink up to 0.5mA of current.  
Fully differential design  
Supports both standard and low voltage operation  
Available in 20-pin SOIC package  
To accomplish the level translation the EL90V requires  
three power rails. The VCC supply should be connected  
to the positive supply, and the VEE pin should be  
connected to the negative power supply. The GND pins  
as expected are connected to the system ground plane.  
Both VEE and VCC should be bypassed to ground via  
0.01µF capacitors.  
Under open input conditions, the D input will be biased  
at VCC/2 and the D input will be pulled to VEE. This  
condition will force the Q output to a LOW, ensuring  
stability.  
FUNCTION TABLE  
PIN NAMES  
Function  
VCC  
5V  
GND  
0V  
VEE  
–5V  
Pin  
Function  
ECL/LVECL Inputs  
Dn  
Qn  
–5V ECL to 5V PECL  
PECL/LVPECL Outputs  
–5V ECL to 3.3V LVPECL  
–3.3V LVECL to 5V PECL  
–3.3V LVECL to 3.3V LVPECL  
3.3V  
5V  
0V  
–5V  
0V  
–3.3V  
–3.3V  
VBB  
ECL/LVECL Reference Voltage Output  
3.3V  
0V  
Rev.: I  
Amendment:/0  
March 2006  
M9999-031306  
hbwhelp@micrel.com or (408) 955-1690  
1
1
Isse Date:  

SY100EL90VZI 替代型号

型号 品牌 替代类型 描述 数据表
MC100EL90DWR2G ONSEMI

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−3.3V / −5V Triple ECL Input to PECL Output Translator

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