5秒后页面跳转
SY100EL91LZG PDF预览

SY100EL91LZG

更新时间: 2024-02-01 08:11:52
品牌 Logo 应用领域
美国微芯 - MICROCHIP 光电二极管输出元件接口集成电路锁存器
页数 文件大小 规格书
6页 113K
描述
TRIPLE PECL TO ECL TRANSLATOR, COMPLEMENTARY OUTPUT, PDSO20

SY100EL91LZG 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:SOP, SOP20,.4Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:7 weeks风险等级:5.09
其他特性:REQUIRES -4.2V TO -5.5V SUPPLY FOR LVPECL-TO-ECL TRANSLATION最大延迟:0.76 ns
接口集成电路类型:PECL TO ECL TRANSLATORJESD-30 代码:R-PDSO-G20
JESD-609代码:e4长度:12.83 mm
湿度敏感等级:2标称负供电电压:-3.3 V
位数:1功能数量:3
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出锁存器或寄存器:NONE
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:2.65 mm最大压摆率:10 mA
最大供电电压:3.8 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:7.52 mmBase Number Matches:1

SY100EL91LZG 数据手册

 浏览型号SY100EL91LZG的Datasheet PDF文件第2页浏览型号SY100EL91LZG的Datasheet PDF文件第3页浏览型号SY100EL91LZG的Datasheet PDF文件第4页浏览型号SY100EL91LZG的Datasheet PDF文件第5页浏览型号SY100EL91LZG的Datasheet PDF文件第6页 
NOT RECOMMENDED FOR NEW DESIGNS  
SY100EL91L
3.3V TRIPLE LVPECL-to-ECL  
OR LVPECL-to-LVECL TRANSLATOR  
DESCRIPTION  
FEATURES  
The SY100EL91L is a triple LVPECL-to-ECL or  
LVPECL-to-LVECL translator.  
3.3V power supply  
620ps propagation delay  
Fully differential design  
A VBB output is provided for interfacing with single  
ended PECL signals at the input. If a single ended input  
is to be used, the VBB output should be connected to the  
D input. The active signal would then drive the D input.  
When used, the VBB output should be bypassed to ground  
via a 0.01µF capacitor. The VBB output is designed to act  
as the switching reference for the EL91L under single  
ended input switching conditions. As a result this pin can  
only source/sink up to 0.5mA of current.  
Supports low voltage operation  
Available in 20-pin SOIC package  
To accomplish the level translation the EL91L requires  
three power rails. The VCC supply should be connected  
to the positive supply, and the VEE pin should be  
connected to the negative power supply. The GND pins  
as expected are connected to the system ground plane.  
Both VEE and VCC should be bypassed to ground via  
0.01µF capacitors.  
Under open input conditions, the D input will be biased  
at VCC/2 and the D input will be pulled to GND. This  
condition will force the Q output to a LOW, ensuring  
stability.  
PIN NAMES  
FUNCTION TABLE  
Function  
Vcc  
3.3V  
3.3V  
VEE  
Pin  
Function  
LVPECL-to-ECL  
LVPECL-to-LVECL  
–5.0V  
–3.3V  
Dn  
Qn  
PECL Inputs  
ECL Outputs  
PECL_VBB  
PECL Reference Voltage Output  
Rev.: H  
Amendment:/0  
M9999-031306  
hbwhelp@micrel.com or (408) 955-1690  
1
1
Issue Date: December2005  

SY100EL91LZG 替代型号

型号 品牌 替代类型 描述 数据表
MC100EL91DWG ONSEMI

类似代替

5 V Triple PECL Input to −5 V ECL Output Translator

与SY100EL91LZG相关器件

型号 品牌 获取价格 描述 数据表
SY100EL91LZI MICROCHIP

获取价格

PECL to ECL Translator, 3 Func, Complementary Output, ECL100K, PDSO20, 0.300 INCH, SOIC-20
SY100EL91LZITR MICROCHIP

获取价格

PECL to ECL Translator, 3 Func, Complementary Output, ECL100K, PDSO20, 0.300 INCH, SOIC-20
SY100EL91ZC MICREL

获取价格

3.3V TRIPLE LVPECL-to-ECL OR LVPECL-to-LVECL TRANSLATOR
SY100EL91ZCTR MICREL

获取价格

3.3V TRIPLE LVPECL-to-ECL OR LVPECL-to-LVECL TRANSLATOR
SY100EL91ZG MICREL

获取价格

3.3V TRIPLE LVPECL-to-ECL OR LVPECL-to-LVECL TRANSLATOR
SY100EL91ZGTR MICREL

获取价格

3.3V TRIPLE LVPECL-to-ECL OR LVPECL-to-LVECL TRANSLATOR
SY100EL91ZI MICREL

获取价格

3.3V TRIPLE LVPECL-to-ECL OR LVPECL-to-LVECL TRANSLATOR
SY100EL91ZITR MICREL

获取价格

3.3V TRIPLE LVPECL-to-ECL OR LVPECL-to-LVECL TRANSLATOR
SY100EL92 MICREL

获取价格

TRIPLE LVPECL-TO-PECL OR PECL-TO-LVPECL TRANSLATOR
SY100EL92 MICROCHIP

获取价格

The SY100EL92 is a triple LVPECL-to-PECL or PECLto-LVPECL translator. The device receives