Datasheet > SUM50N03-13LC

SUM50N03-13LC

更新时间： 2024-11-29 03:30:43

品牌	Logo	应用领域
威世 - VISHAY		/
页数	文件大小	规格书
4页	70K
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Current-Sensing Power MOSFETs

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SUM50N03-13LC 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Transferred	包装说明：	,
针数：	5	Reach Compliance Code：	unknown
风险等级：	5.27	配置：	Single
最大漏极电流 (Abs) (ID)：	50 A	FET 技术：	METAL-OXIDE SEMICONDUCTOR
JESD-609代码：	e0	工作模式：	ENHANCEMENT MODE
最高工作温度：	175 °C	极性/信道类型：	N-CHANNEL
最大功率耗散 (Abs)：	83 W	子类别：	FET General Purpose Power
表面贴装：	YES	端子面层：	Tin/Lead (Sn/Pb)
Base Number Matches：	1

SUM50N03-13LC 数据手册

AN606

Vishay Siliconix

Current-Sensing Power MOSFETs

Kandarp Pandya

INTRODUCTION

Vishay Siliconix current-sensing power MOSFETs offer a

simple means of incorporating a protection feature into an

electronic control circuit and avoiding catastrophic failures

resulting from overcurrent (overload) and/or short-circuit

conditions. The device package is a modified D²PAK with five

pins. The MOSFET termination retains the standard D²PAK

footprint for a three-pin device. The additional two pins provide

termination for a current-sense output and an internal Kelvin

connection to the source. For current sensing, the MOSFET

design employs a small number of the total number of

MOSFET cells in a known ratio. The latter define the

current-sense parameters. A typical control interface uses a

simple circuit with an op-amp or a comparator. This approach

offers the freedom of control-level setting and facilitates its

incorporation into the main control system.

between gate and drain-stub and between drain-stub and source,

respectively. See Application Note 826, Recommended Minimum

Pad Patterns With Outline Access for Vishay Siliconix

MOSFETs

(http://www.vishay.com/doc?72286),

for

the

recommended PCB layout dimensional details of the pad pattern.

Modified-part library symbols for schematic symbol and PCB

layout are available on the “Protel” (PCB design software)

platform. For soft copy, please contact Vishay Siliconix in Santa

Clara, Calif., in the United States, by phoning 1-408-567-8927.

The Principle Behind the Current-Sensing Feature

The most efficient way to sense the drain-source current is to

use the ratio-metric measurement. In a power MOSFET, it is

possible to implement this method easily.

DEVICE DESCRIPTION AND PRINCIPLE OF

OPERATION

The cell density, a favored term within the power MOSFET

industry, conveys that the power MOSFET structure consists

of many cells connected in parallel. In principle, these cells

constitute a resistive path for drain-source current. Electrically,

these cells are parallel connected resistors, r_DS(on)s. Each cell

- being identical in structure and electrical characteristics -

shares the current equally when the device is on. This property

enables design of a MOSFET with a current-sensing feature.

D (Tab, 3)

D PAK-5

(1)

(2)

(4)

Dividing the MOSFET cells in a known ratio creates two paths

that share the drain-source current. The path with the smaller

number of cells constitutes the sense current, which is much

smaller than the current conducting through the rest of the

cells. A very simple, low-power, external circuit can measure

this current. Multiplying this value with the cell ratio gives the

total drain-source current.

KELVIN

1 2 3 4 5

SENSE

S (5)

N-Channel MOSFET

SENSE

KELVIN

The classic Kelvin termination for the return of sense current

to the main source connection insures the measurement

accuracy. This terminal not only eliminates the ground loop,

but also minimizes the imbalance of internal structures with

two current paths.

FIGURE 1. Package Information and Schematic Symbol

Package Information and Schematic Symbol, Figure 1, shows a

partial reproduction of a datasheet for a current-sensing

MOSFET, SUM50N03-13C. Gate, drain-stub/tab, and source

(pins 1, 2, and 3) are in the same position as in a standard D²PAK

(TO-263) MOSFET. However, pin-out modification is required to

incorporate current-sense (pin 2) and Kelvin-to-source (pin 4)

The Current-Sensing Parameters, Table 1, and the

Current-Sense Die Characteristics and Schematic, Figure 2,

help to demonstrate the current-sensing operation and circuit

implementation.

TABLE 1: Current Sense Characteristics

Current Sensing Ratio

= 1 A, V

= 10 V, R = 1.1 W

SENSE

420

520

3.5

620

GSS

Mirror Active Resistance

= 10 V, I = 10 mA

m(on)

Document Number: 71991

17-Dec-03

www.vishay.com

12 3 4

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与SUM50N03-13LC相关器件

型号	品牌	获取价格	描述	数据表
SUM50N03-13LC-E3	VISHAY	获取价格	TRANSISTOR 50 A, 30 V, 0.013 ohm, N-CHANNEL, Si, POWER, MOSFET, ROHS COMPLIANT, D2PAK-5, F
SUM50N06-16L	VISHAY	获取价格	N-Channel 60-V (D-S), 175C MOSFET, Logic Level
SUM50N06-16L-E3	VISHAY	获取价格	TRANSISTOR 50 A, 60 V, 0.022 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-263AB, ROHS COMPLIANT,
SUM50UF	SSDI	获取价格	0.4 AMPS 2000 - 5000 VOLTS 60 nsec HIGH VOLTAGE ULTRA FAST RECTIFIER
SUM50UFS	SSDI	获取价格	Rectifier Diode, 1 Element, 0.4A, 5000V V(RRM), Silicon, HERMETIC SEALED PACKAGE-2
SUM50UFSMS	SSDI	获取价格	0.4 AMPS 2000 - 5000 VOLTS 60 nsec HIGH VOLTAGE ULTRA FAST RECTIFIER
SUM50UFSMSS	SSDI	获取价格	Rectifier Diode, 1 Element, 0.4A, 5000V V(RRM), Silicon, HERMETIC SEALED, SMS, 2 PIN
SUM50UFSMSTX	SSDI	获取价格	暂无描述
SUM50UFSMSTXV	SSDI	获取价格	Rectifier Diode, 1 Element, 0.4A, 5000V V(RRM), Silicon, HERMETIC SEALED, SMS, 2 PIN
SUM50UFTXV	SSDI	获取价格	Rectifier Diode, 1 Element, 0.4A, 5000V V(RRM), Silicon, HERMETIC SEALED PACKAGE-2

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