Datasheet > STP38N06

STP38N06

更新时间： 2024-11-01 22:13:43

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		晶体晶体管
页数	文件大小	规格书
11页	136K
描述
N - CHANNEL ENHANCEMENT MODE ”ULTRA HIGH DENSITY” POWER MOS TRANSISTOR

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数据手册

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STP38N06 数据手册

STP38N06

N - CHANNEL ENHANCEMENT MODE

”ULTRA HIGH DENSITY” POWER MOS TRANSISTOR

PRELIMINARY DATA

TYPE

V_DSS

R_DS(on)

I_D

STP38N06

60 V

< 0.03 Ω

38 A (*)

■

TYPICAL R_DS(on)= 0.026 Ω

AVALANCHERUGGED TECHNOLOGY

100% AVALANCHE TESTED

REPETITIVE AVALANCHE DATA AT 100^oC

HIGH CURRENT CAPABILITY

175^oC OPERATING TEMPERATURE

HIGH dV/dt RUGGEDNESS

APPLICATION ORIENTED

CHARACTERIZATION

TO-220

APPLICATIONS

■

HIGH CURRENT, HIGH SPEED SWITCHING

POWER MOTOR CONTROL

DC-DC & DC-AC CONVERTERS

SYNCRONOUS RECTIFICATION

INTERNAL SCHEMATIC DIAGRAM

ABSOLUTE MAXIMUM RATINGS

Symbol

V_DS

V_DGR

V_GS

I_D

Parameter

Value

Unit

Drain-source Voltage (V_GS= 0)

Drain- gate Voltage (R_GS= 20 kΩ)

Gate-source Voltage

Drain Current (continuous) at T_c= 25 ^oC

Drain Current (continuous) at T_c= 100 ^oC

Drain Current (pulsed)

± 20

I_D

_DM(• )

152

P_tot

Total Dissipation at T_c= 25 ^oC

Derating Factor

0.6

W/^oC

V/ns

^oC

dV/dt(¹) Peak Diode Recovery voltage slope

T_stg

Storage Temperature

-65 to 175

175

T_j

Max. Operating Junction Temperature

(•) Pulse width limited by safe operating area

1/11

March 1996

12 3 4 5 6 7...11

中文翻译

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