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STP38N06 PDF预览

STP38N06

更新时间: 2024-11-22 22:13:43
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 晶体晶体管
页数 文件大小 规格书
11页 136K
描述
N - CHANNEL ENHANCEMENT MODE ”ULTRA HIGH DENSITY” POWER MOS TRANSISTOR

STP38N06 数据手册

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STP38N06  
N - CHANNEL ENHANCEMENT MODE  
”ULTRA HIGH DENSITY” POWER MOS TRANSISTOR  
PRELIMINARY DATA  
TYPE  
VDSS  
RDS(on)  
ID  
STP38N06  
60 V  
< 0.03 Ω  
38 A (*)  
TYPICAL RDS(on) = 0.026 Ω  
AVALANCHERUGGED TECHNOLOGY  
100% AVALANCHE TESTED  
REPETITIVE AVALANCHE DATA AT 100oC  
HIGH CURRENT CAPABILITY  
175oC OPERATING TEMPERATURE  
HIGH dV/dt RUGGEDNESS  
3
2
1
APPLICATION ORIENTED  
CHARACTERIZATION  
TO-220  
APPLICATIONS  
HIGH CURRENT, HIGH SPEED SWITCHING  
POWER MOTOR CONTROL  
DC-DC & DC-AC CONVERTERS  
SYNCRONOUS RECTIFICATION  
INTERNAL SCHEMATIC DIAGRAM  
ABSOLUTE MAXIMUM RATINGS  
Symbol  
VDS  
VDGR  
VGS  
ID  
Parameter  
Value  
Unit  
Drain-source Voltage (VGS = 0)  
Drain- gate Voltage (RGS = 20 k)  
Gate-source Voltage  
Drain Current (continuous) at Tc = 25 oC  
Drain Current (continuous) at Tc = 100 oC  
Drain Current (pulsed)  
60  
60  
V
V
± 20  
38  
V
A
ID  
26  
A
I
DM()  
152  
90  
A
Ptot  
Total Dissipation at Tc = 25 oC  
W
Derating Factor  
0.6  
W/oC  
V/ns  
oC  
oC  
dV/dt(1) Peak Diode Recovery voltage slope  
7
Tstg  
Storage Temperature  
-65 to 175  
175  
Tj  
Max. Operating Junction Temperature  
() Pulse width limited by safe operating area  
1/11  
March 1996  

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