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SST39SF040-55-4C-NHE-T PDF预览

SST39SF040-55-4C-NHE-T

更新时间: 2024-11-08 13:14:03
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美国微芯 - MICROCHIP 闪存存储内存集成电路
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SST39SF040-55-4C-NHE-T 数据手册

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1 Mbit / 2 Mbit / 4 Mbit (x8) Multi-Purpose Flash  
SST39SF010A / SST39SF020A / SST39SF040  
Data Sheet  
The SST39SF010A / SST39SF020A / SST39SF040 are CMOS Multi-Purpose  
Flash (MPF) devices manufactured with SST proprietary, high performance  
CMOS SuperFlash technology. The split-gate cell design and thick oxide tunnel-  
ing injector attain better reliability and manufacturability compared with alternate  
approaches. The SST39SF010A / SST39SF020A / SST39SF040 write (Program  
or Erase) with a 4.5-5.5V power supply, and conforms to JEDEC standard pinouts  
for x8 memories  
Features  
• Organized as 128K x8 / 256K x8 / 512K x8  
• Single 4.5-5.5V Read and Write Operations  
• Superior Reliability  
• Fast Erase and Byte-Program  
– Sector-Erase Time: 18 ms (typical)  
– Chip-Erase Time: 70 ms (typical)  
– Byte-Program Time: 14 µs (typical)  
– Chip Rewrite Time:  
2 seconds (typical) for SST39SF010A  
4 seconds (typical) for SST39SF020A  
8 seconds (typical) for SST39SF040  
– Endurance: 100,000 Cycles (typical)  
– Greater than 100 years Data Retention  
• Low Power Consumption  
(typical values at 14 MHz)  
• End-of-Write Detection  
– Active Current: 10 mA (typical)  
– Standby Current: 30 µA (typical)  
Toggle Bit  
– Data# Polling  
• Sector-Erase Capability  
• TTL I/O Compatibility  
– Uniform 4 KByte sectors  
• JEDEC Standard  
• Fast Read Access Time:  
– Flash EEPROM Pinouts and command sets  
– 55 ns  
– 70 ns  
• Packages Available  
– 32-lead PLCC  
– 32-lead TSOP (8mm x 14mm)  
– 32-pin PDIP  
• Latched Address and Data  
• Automatic Write Timing  
• All devices are RoHS compliant  
– Internal VPP Generation  
www.microchip.com  
©2013 Silicon Storage Technology, Inc.  
DS25022B  
04/13  

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