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SSM3K35MFV PDF预览

SSM3K35MFV

更新时间: 2024-11-23 06:14:15
品牌 Logo 应用领域
东芝 - TOSHIBA 晶体开关小信号场效应晶体管光电二极管
页数 文件大小 规格书
5页 199K
描述
High-Speed Switching Applications Analog Switch Applications

SSM3K35MFV 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:SMALL OUTLINE, R-PDSO-F3针数:3
Reach Compliance Code:unknownECCN代码:EAR99
风险等级:5.2Is Samacsys:N
配置:SINGLE WITH BUILT-IN DIODE AND RESISTOR最小漏源击穿电压:20 V
最大漏极电流 (ID):0.18 A最大漏源导通电阻:4 Ω
FET 技术:METAL-OXIDE SEMICONDUCTORJESD-30 代码:R-PDSO-F3
元件数量:1端子数量:3
工作模式:ENHANCEMENT MODE封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED极性/信道类型:N-CHANNEL
认证状态:Not Qualified表面贴装:YES
端子形式:FLAT端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

SSM3K35MFV 数据手册

 浏览型号SSM3K35MFV的Datasheet PDF文件第2页浏览型号SSM3K35MFV的Datasheet PDF文件第3页浏览型号SSM3K35MFV的Datasheet PDF文件第4页浏览型号SSM3K35MFV的Datasheet PDF文件第5页 
SSM3K35MFV  
TOSHIBA Field-Effect Transistor Silicon N-Channel MOS Type  
SSM3K35MFV  
High-Speed Switching Applications  
Unit: mm  
Analog Switch Applications  
1.2±0.05  
0.8±0.05  
1.2 V drive  
Low ON-resistance : R = 20 (max) (@V  
= 1.2 V)  
= 1.5 V)  
= 2.5 V)  
= 4.0 V)  
on  
GS  
: R  
: R  
: R  
=
=
=
8 (max) (@V  
4 (max) (@V  
3 (max) (@V  
on  
on  
on  
GS  
GS  
GS  
1
2
3
Absolute Maximum Ratings (Ta = 25˚C)  
Characteristic  
Drain–source voltage  
Symbol  
Rating  
Unit  
V
V
20  
±10  
V
V
DSS  
Gate–source voltage  
1.Gate  
2.Source  
3.Drain  
GSS  
DC  
I
180  
D
VESM  
Drain current  
mA  
Pulse  
I
360  
DP  
Drain power dissipation  
Channel temperature  
Storage temperature  
P (Note 1)  
150  
mW  
°C  
D
JEDEC  
T
ch  
150  
JEITA  
T
stg  
55~150  
°C  
TOSHIBA  
2-1L1B  
Note 1: Mounted on an FR4 board  
Weight: 1.5 mg (typ.)  
(25.4 mm × 25.4 mm × 1.6 t, Cu Pad: 0.585 mm2)  
Electrical Characteristics (Ta = 25°C)  
Characteristic  
Gate leakage current  
Symbol  
Test Condition  
Min  
Typ.  
Max  
Unit  
I
V
= ±10 V, V = 0 V  
DS  
20  
±10  
1
μA  
V
GSS  
GS  
Drain–source breakdown voltage  
Drain cutoff current  
V
I
= 0.1 mA, V  
= 0 V  
= 0 V  
(BR) DSS  
D
GS  
GS  
I
V
V
V
= 20 V, V  
μA  
V
DSS  
DS  
DS  
DS  
Gate threshold voltage  
V
= 3 V, I = 1 mA  
0.4  
115  
1.0  
3
th  
D
Forward transfer admittance  
Y ⏐  
= 3 V, I = 50 mA  
(Note 2)  
(Note 2)  
(Note 2)  
(Note 2)  
(Note 2)  
mS  
fs  
D
I
I
I
I
= 50 mA, V  
= 4 V  
1.5  
2
D
D
D
D
GS  
GS  
= 50 mA, V  
= 2.5 V  
4
Drain–source ON-resistance  
R
Ω
DS (ON)  
= 5 mA, V  
= 5 mA, V  
= 1.5 V  
= 1.2 V  
3
8
GS  
GS  
5
20  
-1.2  
Input capacitance  
C
C
9.5  
4.1  
9.5  
115  
300  
-0.9  
iss  
Reverse transfer capacitance  
Output capacitance  
V
= 3 V, V  
= 0 V, f = 1 MHz  
GS  
pF  
DS  
rss  
oss  
on  
C
t
Turn-on time  
Switching time  
V
V
= 3 V, I = 50 mA,  
DD  
GS  
D
ns  
V
= 0 to 2.5 V  
Turn-off time  
t
off  
Drain–source forward voltage  
V
I
= - 180 mA, V = 0 V  
GS  
(Note 2)  
DSF  
D
Note 2: Pulse test  
1
2008-05-27  

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