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SSM3K15CT PDF预览

SSM3K15CT

更新时间: 2024-11-16 04:02:43
品牌 Logo 应用领域
东芝 - TOSHIBA 晶体开关小信号场效应晶体管
页数 文件大小 规格书
5页 153K
描述
High-Speed Switching Applications

SSM3K15CT 技术参数

是否无铅: 不含铅生命周期:Not Recommended
包装说明:CHIP CARRIER, R-XBCC-N3针数:3
Reach Compliance Code:unknownECCN代码:EAR99
风险等级:5.2外壳连接:DRAIN
配置:SINGLE WITH BUILT-IN DIODE AND RESISTOR最小漏源击穿电压:30 V
最大漏极电流 (Abs) (ID):0.1 A最大漏极电流 (ID):0.1 A
最大漏源导通电阻:7 ΩFET 技术:METAL-OXIDE SEMICONDUCTOR
JESD-30 代码:R-XBCC-N3元件数量:1
端子数量:3工作模式:ENHANCEMENT MODE
最高工作温度:150 °C封装主体材料:UNSPECIFIED
封装形状:RECTANGULAR封装形式:CHIP CARRIER
极性/信道类型:N-CHANNEL最大功率耗散 (Abs):0.1 W
认证状态:Not Qualified子类别:FET General Purpose Power
表面贴装:YES端子形式:NO LEAD
端子位置:BOTTOM晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

SSM3K15CT 数据手册

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SSM3K15CT  
TOSHIBA Field Effect Transistor Silicon N-Channel MOS Type  
SSM3K15CT  
High-Speed Switching Applications  
Analog Switch Applications  
Unit: mm  
0.6±0.05  
0.5±0.03  
Optimum for high-density mounting in small packages  
Low ON-resistance  
: R = 4.0 (max) (@V  
= 4 V)  
on  
GS  
GS  
: R = 7.0 (max) (@V  
= 2.5 V)  
on  
Absolute Maximum Ratings (Ta = 25°C)  
Characteristics  
Drain-source voltage  
Symbol  
Rating  
Unit  
V
0.05±0.03  
0.35±0.02  
V
30  
±20  
DS  
0.15±0.03  
Gate-source voltage  
V
V
GSS  
DC  
I
100  
D
Drain current  
mA  
Pulse  
I
200  
DP  
Drain power dissipation (Ta = 25°C)  
Channel temperature  
P
(Note 1)  
100  
mW  
°C  
D
CST3  
T
ch  
150  
Storage temperature  
T
stg  
55~150  
°C  
JEDEC  
JEITA  
-
Note: Using continuously under heavy loads (e.g. the application of  
high temperature/current/voltage and the significant change in  
temperature, etc.) may cause this product to decrease in the  
reliability significantly even if the operating conditions (i.e.  
operating temperature/current/voltage, etc.) are within the  
absolute maximum ratings.  
-
TOSHIBA  
2-1J1B  
Weight: 0.75 mg (typ.)  
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook  
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test  
report and estimated failure rate, etc).  
Note 1: Mounted on an FR4 board  
2
(10 mm × 10 mm × 1.0 t, Cu Pad: 100 mm )  
Marking (Top View)  
Pin Condition (Top View)  
Equivalent Circuit  
Polarity mark  
Polarity mark (on the top)  
3
1
3
SB  
2
1. Gate  
1
2
2. Source  
3. Drain  
*Electrodes: On the bottom  
Handling Precaution  
When handling individual devices that are not yet mounted on a circuit board, ensure that the environment is protected  
against electrostatic discharge. Operators should wear anti-static clothing, and containers and other objects that come  
into direct contact with devices should be made of anti-static materials.  
1
2007-11-01  

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