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SSM3K123TU(T5LCLA) PDF预览

SSM3K123TU(T5LCLA)

更新时间: 2024-11-16 20:38:31
品牌 Logo 应用领域
东芝 - TOSHIBA 开关光电二极管晶体管
页数 文件大小 规格书
6页 166K
描述
Small Signal Field-Effect Transistor, 4.2A I(D), 20V, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET

SSM3K123TU(T5LCLA) 技术参数

生命周期:ObsoleteReach Compliance Code:unknown
风险等级:5.71配置:SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压:20 V最大漏极电流 (ID):4.2 A
最大漏源导通电阻:0.032 ΩFET 技术:METAL-OXIDE SEMICONDUCTOR
JESD-30 代码:R-PDSO-F3元件数量:1
端子数量:3工作模式:ENHANCEMENT MODE
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:SMALL OUTLINE极性/信道类型:N-CHANNEL
表面贴装:YES端子形式:FLAT
端子位置:DUAL晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

SSM3K123TU(T5LCLA) 数据手册

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SSM3K123TU  
TOSHIBA Field Effect Transistor Silicon N-Channel MOS Type  
SSM3K123TU  
Power Management Switch Applications  
High-Speed Switching Applications  
Unit: mm  
1.5 V drive  
Low ON-resistance:  
R
on  
R
on  
R
on  
R
on  
= 66 m(max) (@V  
= 43 m(max) (@V  
= 32 m(max) (@V  
= 28 m(max) (@V  
= 1.5 V)  
= 1.8 V)  
= 2.5 V)  
= 4.0 V)  
GS  
GS  
GS  
GS  
2.1±0.1  
1.7±0.1  
Absolute Maximum Ratings (Ta = 25°C)  
1
Characteristics  
Drain-Source voltage  
Symbol  
Rating  
Unit  
3
2
V
V
20  
± 10  
4.2  
V
V
DSS  
Gate-Source voltage  
GSS  
DC  
I
D
Drain current  
A
Pulse  
I
8.4  
DP  
P
P
800  
D (Note 1)  
D (Note 2)  
Drain power dissipation  
Channel temperature  
mW  
500  
T
150  
°C  
°C  
ch  
Storage temperature range  
T
55~150  
stg  
1: Gate  
2: Source  
3: Drain  
Note:  
Using continuously under heavy loads (e.g. the application of  
high temperature/current/voltage and the significant change in  
temperature, etc.) may cause this product to decrease in the  
reliability significantly even if the operating conditions (i.e.  
operating temperature/current/voltage, etc.) are within the  
absolute maximum ratings.  
Please design the appropriate reliability upon reviewing the  
Toshiba Semiconductor Reliability Handbook (“Handling  
Precautions”/“Derating Concept and Methods”) and individual  
reliability data (i.e. reliability test report and estimated failure  
rate, etc).  
UFM  
JEDEC  
JEITA  
TOSHIBA  
2-2U1A  
Weight: 6.6 mg (typ.)  
Note 1: Mounted on a ceramic board.  
(25.4 mm × 25.4 mm × 0.8 t, Cu Pad: 645 mm2 )  
Note 2: Mounted on a FR4 board.  
(25.4 mm × 25.4 mm × 1.6 t, Cu Pad: 645 mm2 )  
Electrical Characteristics (Ta = 25°C)  
Characteristics  
Symbol  
Test Condition  
Min  
Typ.  
Max  
Unit  
V
I
I
= 1 mA, V  
= 1 mA, V  
= 0V  
20  
12  
1
(BR) DSS  
(BR) DSX  
D
D
GS  
GS  
Drain-Source breakdown voltage  
V
V
= − 10 V  
= 0V  
Drain cutoff current  
I
V
V
V
V
= 20 V, V  
μA  
μA  
V
DSS  
GSS  
DS  
GS  
DS  
DS  
GS  
= ± 10 V, V  
Gate leakage current  
Gate threshold voltage  
Forward transfer admittance  
I
= 0V  
±1  
1.0  
28  
32  
43  
66  
DS  
= 3 V, I = 1 mA  
V
0.35  
12.5  
th  
Y ⏐  
D
= 3 V, I = 3.0 A  
(Note 3)  
(Note 3)  
(Note 3)  
(Note 3)  
(Note 3)  
25  
S
fs  
D
I
I
I
I
= 3.0 A, V  
= 3.0 A, V  
= 1.0 A, V  
= 0.5 A, V  
= 4.0 V  
= 2.5 V  
= 1.8 V  
= 1.5 V  
19  
D
D
D
D
GS  
GS  
GS  
GS  
23  
Drain-Source ON-resistance  
R
mΩ  
DS (ON)  
28  
35  
Input capacitance  
C
C
1010  
162  
150  
13.6  
9.8  
3.8  
17  
iss  
V
V
= 10 V, V  
= 0, f = 1 MHz  
GS  
pF  
nC  
Output capacitance  
Reverse transfer capacitance  
Total Gate Charge  
DS  
DS  
oss  
C
rss  
Q
g
= 10 V, I = 4.2 A, V  
DS  
= 4 V  
GateSource Charge  
GateDrain Charge  
Q
gs  
Q
gd  
GS  
1.2  
Turn-on time  
Switching time  
t
t
V
V
= 10 V, I = 1.0 A,  
= 0 to 2.5 V, R = 4.7 Ω  
on  
off  
DD  
GS  
D
ns  
V
Turn-off time  
30  
G
Drain-Source forward voltage  
V
I
= −4.2 A, V = 0 V  
GS  
(Note 3)  
0.8  
DSF  
D
Note 3: Pulse test  
Start of commercial production  
2007-04  
1
2014-03-01  

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