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SPB11E104PAD PDF预览

SPB11E104PAD

更新时间: 2024-11-17 06:47:47
品牌 Logo 应用领域
京瓷/艾维克斯 - KYOCERA AVX /
页数 文件大小 规格书
2页 100K
描述
Array/Network Capacitor, 100V, Z5U, 0.1uF, Through Hole Mount, SIP-13, SIP

SPB11E104PAD 数据手册

 浏览型号SPB11E104PAD的Datasheet PDF文件第2页 
Single-In-Line Packages (SIP)  
Capacitor Arrays  
SIP-style, MLC ceramic capacitor arrays are Single-In-Line,  
conformally coated packages. These capacitor networks  
incorporate multiple capacitors into a single substrate and,  
therefore, offer excellent TC tracking. The utilization of  
SIP capacitor arrays minimizes board real estate and  
reduces component count in the assembly. Various circuit  
configurations and capacitance/voltage values are available.  
Dimensions in millimeters (inches)  
Length (Max.)  
3.429  
(0.135)  
Max.  
Length = [# of Leads x 2.54 (0.100)]  
+ 1.27 (0.050)  
i.e., 10 Lead SIP = 26.67 (1.050)  
7.62 (0.300)  
Max.  
0.254  
(0.010)  
Typ.  
3.81  
(0.150) Min.  
0.508 (0.020) Typ.  
1.524 (0.060) Typ.  
2.54 (0.100) Typ.  
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10  
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10  
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2
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10  
CIRCUIT CONFIGURATION "A"  
ONE END LEAD GROUND  
CIRCUIT CONFIGURATION "B"  
ADJACENT LEAD PAIR CAPS  
CIRCUIT CONFIGURATION "C"  
BOTH END LEADS GROUND  
106  

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