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SPB11E104PAE PDF预览

SPB11E104PAE

更新时间: 2024-09-28 18:28:31
品牌 Logo 应用领域
京瓷/艾维克斯 - KYOCERA AVX 电容器
页数 文件大小 规格书
2页 63K
描述
Array/Network Capacitor, 100V, Z5U, 0.1uF, Through Hole Mount, SIP-14, SIP

SPB11E104PAE 技术参数

生命周期:Obsolete包装说明:SIP,
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8532.25.00.80风险等级:5.84
电容:0.1 µF电容器类型:ARRAY/NETWORK CAPACITOR
长度:36.83 mm安装特点:THROUGH HOLE MOUNT
负容差:网络类型:ISOLATED C NETWORK
元件数量:1功能数量:7
端子数量:14最高工作温度:85 °C
最低工作温度:10 °C封装代码:SIP
封装形状:RECTANGULAR PACKAGE正容差:100%
额定(直流)电压(URdc):100 V座面最大高度:7.62 mm
表面贴装:NO温度特性代码:Z5U
温度系数:-56/+22% ppm/ °C端子节距:2.54 mm
端子形状:FLAT宽度:3.429 mm
Base Number Matches:1

SPB11E104PAE 数据手册

 浏览型号SPB11E104PAE的Datasheet PDF文件第2页 
Single-In-Line Packages (SIP)  
Capacitor Arrays  
SIP-style, MLC ceramic capacitor arrays are Single-In-Line,  
conformally coated packages. These capacitor networks  
incorporate multiple capacitors into a single substrate and,  
therefore, offer excellent TC tracking. The utilization of  
SIP capacitor arrays minimizes board real estate and  
reduces component count in the assembly. Various circuit  
configurations and capacitance/voltage values are available.  
Dimensions in millimeters (inches)  
STYLE 1  
(AVX STD OFFERING)  
STYLE C  
Length (Max.)  
3.429  
(0.135)  
Max.  
3.429  
(0.135)  
Max.  
Length = [# of Leads x 2.54 (0.100)]  
+ 1.27 (0.050)  
i.e., 10 Lead SIP = 26.67 (1.050)  
7.62 (0.300)  
Max.  
0.254  
(0.010)  
Typ.  
0.254  
(0.010)  
Typ.  
3.81  
(0.150) Min.  
0.508 (0.020) Typ.  
1.524 (0.060) Typ.  
2.54 (0.100) Typ.  
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10  
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9
10  
1
2
3
4
5
6
7
8
9
10  
CIRCUIT CONFIGURATION "A"  
ONE END LEAD GROUND  
CIRCUIT CONFIGURATION "B"  
ADJACENT LEAD PAIR CAPS  
CIRCUIT CONFIGURATION "C"  
BOTH END LEADS GROUND  
86  

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