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SN74LVC3G17YZPR PDF预览

SN74LVC3G17YZPR

更新时间: 2024-11-15 23:06:23
品牌 Logo 应用领域
德州仪器 - TI 栅极触发器逻辑集成电路
页数 文件大小 规格书
12页 259K
描述
TRIPLE SCHMITT TRIGGER BUFFER

SN74LVC3G17YZPR 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:BGA
包装说明:DSBGA-8针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:1.5Is Samacsys:N
系列:LVC/LCX/ZJESD-30 代码:R-XBGA-B8
JESD-609代码:e1长度:1.9 mm
负载电容(CL):50 pF逻辑集成电路类型:BUFFER
最大I(ol):0.032 A湿度敏感等级:1
功能数量:3输入次数:1
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:VFBGA封装等效代码:BGA8,2X4,20
封装形状:RECTANGULAR封装形式:GRID ARRAY, VERY THIN PROFILE, FINE PITCH
包装方法:TR峰值回流温度(摄氏度):260
电源:3.3 V最大电源电流(ICC):0.01 mA
Prop。Delay @ Nom-Sup:5.4 ns传播延迟(tpd):9.2 ns
认证状态:Not Qualified施密特触发器:YES
座面最大高度:0.5 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Silver/Copper (Sn/Ag/Cu)端子形式:BALL
端子节距:0.5 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:0.9 mm
Base Number Matches:1

SN74LVC3G17YZPR 数据手册

 浏览型号SN74LVC3G17YZPR的Datasheet PDF文件第2页浏览型号SN74LVC3G17YZPR的Datasheet PDF文件第3页浏览型号SN74LVC3G17YZPR的Datasheet PDF文件第4页浏览型号SN74LVC3G17YZPR的Datasheet PDF文件第5页浏览型号SN74LVC3G17YZPR的Datasheet PDF文件第6页浏览型号SN74LVC3G17YZPR的Datasheet PDF文件第7页 
ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈ ꢉꢂ  
ꢄꢎ  
ꢐꢌ  
SCES470A − AUGUST 2003 − REVISED AUGUST 2003  
DCT OR DCU PACKAGE  
(TOP VIEW)  
D
Available in the Texas Instruments  
NanoStarand NanoFreePackages  
D
D
D
D
D
D
Supports 5-V V  
Operation  
CC  
1A  
3Y  
2A  
V
CC  
1
2
3
4
8
7
6
5
Inputs Accept Voltages to 5.5 V  
1Y  
3A  
2Y  
Max t of 5.4 ns at 3.3 V  
pd  
Low Power Consumption, 10-µA Max I  
GND  
CC  
24-mA Output Drive at 3.3 V  
YEP OR YZP PACKAGE  
(BOTTOM VIEW)  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
= 3.3 V, T = 25°C  
OLP  
CC  
A
4 5  
3 6  
2 7  
1 8  
GND  
2A  
3Y  
2Y  
3A  
1Y  
D
D
D
D
Typical V  
(Output V  
Undershoot)  
OHV  
OH  
>2 V at V  
= 3.3 V, T = 25°C  
CC  
A
I
Supports Partial-Power-Down Mode  
off  
1A  
V
CC  
Operation  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
− 1000-V Charged-Device Model (C101)  
description/ordering information  
This triple Schmitt-trigger buffer is designed for 1.65-V to 5.5-V V  
operation.  
CC  
The SN74LVC3G17 contains three buffers, and performs the Boolean function Y = A. The device functions as  
three independent buffers, but because of Schmitt action, it may have different input threshold levels for  
positive-going (V ) and negative-going (V ) signals.  
T+  
T−  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
NanoStarand NanoFreepackage technology is a major breakthrough in IC packaging concepts, using the  
die as the package.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
NanoStar− WCSP (DSBGA)  
0.23-mm Large Bump − YEP  
SN74LVC3G17YEPR  
SN74LVC3G17YZPR  
Tape and reel  
_ _ _C7_  
NanoFree− WCSP (DSBGA)  
0.23-mm Large Bump − YZP (Pb-free)  
−40°C to 85°C  
SSOP − DCT  
Tape and reel  
Tape and reel  
SN74LVC3G17DCTR  
SN74LVC3G17DCUR  
C17_ _ _  
C17_  
VSSOP − DCU  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.  
DCU: The actual top-side marking has one additional character that designates the assembly/test site.  
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one  
following character to designate the assembly/test site. Pin  
1 identifier indicates solder-bump composition  
(1 = SnPb, = Pb-free).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoStar and NanoFree are trademarks of Texas Instruments.  
ꢊꢣ  
Copyright 2003, Texas Instruments Incorporated  
ꢟ ꢣ ꢠ ꢟꢘ ꢙꢭ ꢛꢚ ꢞ ꢦꢦ ꢤꢞ ꢜ ꢞ ꢝ ꢣ ꢟ ꢣ ꢜ ꢠ ꢨ  
ꢞꢜ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74LVC3G17YZPR 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC3G17YEPR TI

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