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SN74LVC3G34

更新时间： 2024-02-13 17:52:02

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
12页	317K
描述
TRIPLE BUFFER GATE

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中文翻译

获取价格

数据手册

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SN74LVC3G34 数据手册

ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈ ꢇꢃ

ꢉ ꢊꢋꢌ ꢄꢍ ꢎꢏꢐ ꢐꢍ ꢊ ꢈ ꢑꢉꢍ

SCES366H − AUGUST 2001 − REVISED SEPTEMBER 2003

DCT OR DCU PACKAGE

(TOP VIEW)

Available in the Texas Instruments

NanoStar and NanoFree Packages

Supports 5-V V

Operation

Inputs Accept Voltages to 5.5 V

Max t of 4.1 ns at 3.3 V

Low Power Consumption, 10-µA Max I

GND

24-mA Output Drive at 3.3 V

YEA, YEP, YZA, OR YZP PACKAGE

(BOTTOM VIEW)

Typical V

<0.8 V at V

(Output Ground Bounce)

= 3.3 V, T = 25°C

OLP

Typical V

(Output V

Undershoot)

4 5

3 6

2 7

1 8

OHV

GND

>2 V at V

= 3.3 V, T = 25°C

Supports Partial-Power-Down Mode

off

Operation

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

ESD Protection Exceeds JESD 22

− 2000-V Human-Body Model (A114-A)

− 200-V Machine Model (A115-A)

− 1000-V Charged-Device Model (C101)

description/ordering information

This triple buffer gate is designed for 1.65-V to 5.5-V V

function Y = A in positive logic.

operation. The SN74LVC3G34 performs the Boolean

ORDERING INFORMATION

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

†

PACKAGE

‡

NanoStar − WCSP (DSBGA)

0.17-mm Small Bump − YEA

SN74LVC3G34YEAR

SN74LVC3G34YZAR

SN74LVC3G34YEPR

SN74LVC3G34YZPR

NanoFree − WCSP (DSBGA)

0.17-mm Small Bump − YZA (Pb-free)

Reel of 3000

_ _ _C9_

NanoStar − WCSP (DSBGA)

0.23-mm Large Bump − YEP

−40°C to 85°C

NanoFree − WCSP (DSBGA)

0.23-mm Large Bump − YZP (Pb-free)

SSOP − DCT

Reel of 3000

SN74LVC3G34DCTR

SN74LVC3G34DCUR

C34_ _ _

C34_

VSSOP − DCU

Reel of 250

SN74LVC3G34DCUT

†

‡

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.

DCU: The actual top-side marking has one additional character that designates the assembly/test site.

YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code,

and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition

^{(1 = SnPb,}• = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoStar and NanoFree are trademarks of Texas Instruments.

ꢌꢊ ꢒ ꢓꢏ ꢆ ꢉꢋ ꢒ ꢁ ꢓ ꢑꢉꢑ ꢔꢕ ꢖ ꢗꢘ ꢙ ꢚꢛ ꢔꢗꢕ ꢔꢜ ꢝꢞ ꢘ ꢘ ꢟꢕꢛ ꢚꢜ ꢗꢖ ꢠꢞꢡ ꢢꢔꢝ ꢚꢛ ꢔꢗꢕ ꢣꢚ ꢛꢟ ꢤ

ꢌꢘ ꢗ ꢣꢞꢝ ꢛ ꢜ ꢝ ꢗꢕ ꢖꢗ ꢘ ꢙ ꢛ ꢗ ꢜ ꢠꢟ ꢝ ꢔꢖ ꢔꢝꢚ ꢛꢔ ꢗꢕꢜ ꢠꢟ ꢘ ꢛꢥ ꢟ ꢛꢟ ꢘ ꢙꢜ ꢗꢖ ꢉꢟꢦ ꢚꢜ ꢋꢕꢜ ꢛꢘ ꢞꢙ ꢟꢕꢛ ꢜ

ꢜ ꢛ ꢚ ꢕꢣ ꢚ ꢘꢣ ꢧ ꢚ ꢘꢘ ꢚ ꢕ ꢛꢨꢤ ꢌꢘ ꢗ ꢣꢞꢝ ꢛꢔꢗꢕ ꢠꢘ ꢗꢝ ꢟꢜ ꢜꢔ ꢕꢩ ꢣꢗꢟ ꢜ ꢕꢗꢛ ꢕꢟ ꢝꢟ ꢜꢜ ꢚꢘ ꢔꢢ ꢨ ꢔꢕꢝ ꢢꢞꢣ ꢟ

ꢛ ꢟ ꢜ ꢛꢔ ꢕꢩ ꢗꢖ ꢚ ꢢꢢ ꢠꢚ ꢘ ꢚ ꢙ ꢟ ꢛ ꢟ ꢘ ꢜ ꢤ

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...12

中文翻译

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与SN74LVC3G34相关器件

型号	品牌	获取价格	描述	数据表
SN74LVC3G34_07	TI	获取价格	TRIPLE BUFFER GATE
SN74LVC3G34_15	TI	获取价格	Triple Buffer Gate
SN74LVC3G34DCTR	TI	获取价格	TRIPLE BUFFER GATE
SN74LVC3G34DCTRE4	TI	获取价格	TRIPLE BUFFER GATE
SN74LVC3G34DCTRG4	TI	获取价格	TRIPLE BUFFER GATE
SN74LVC3G34DCUR	TI	获取价格	TRIPLE BUFFER GATE
SN74LVC3G34DCURE4	TI	获取价格	TRIPLE BUFFER GATE
SN74LVC3G34DCURG4	TI	获取价格	TRIPLE BUFFER GATE
SN74LVC3G34DCUT	TI	获取价格	TRIPLE BUFFER GATE
SN74LVC3G34DCUTE4	TI	获取价格	TRIPLE BUFFER GATE

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