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SN74LVC3GU04

更新时间： 2024-02-09 12:19:14

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
11页	251K
描述
TRIPLE INVERTER GATE

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数据手册

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SN74LVC3GU04 数据手册

SN74LVC3GU04

TRIPLE INVERTER GATE

www.ti.com

SCES539A–JANUARY 2004–REVISED APRIL 2005

FEATURES

DCT OR DCU PACKAGE

(TOP VIEW)

•

Available in the Texas Instruments

NanoStar™ and NanoFree™ Packages

•

Supports 5-V V_CCOperation

Inputs Accept Voltages to 5.5 V

Max t_pdof 3.9 ns at 3.3 V

GND

Low Power Consumption, 10-µA Max I_CC

±24-mA Output Drive at 3.3 V

YEP OR YZP PACKAGE

(BOTTOM VIEW)

Typical V_OLP(Output Ground Bounce)

< 0.8 V at V_CC= 3.3 V, T_A= 25°C

GND

•

Typical V_OHV(Output V_OHUndershoot)

> 2 V at V_CC= 3.3 V, T_A= 25°C

•

Unbuffered Outputs

Latch-Up Performance Exceeds 100 mA

Per JESD 78, Class II

•

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

DESCRIPTION/ORDERING INFORMATION

This triple inverter is designed for 1.65-V to 5.5-V V_CCoperation.

The SN74LVC3GU04 contains three inverters with unbuffered outputs and performs the Boolean function Y = A.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the

die as the package.

ORDERING INFORMATION

T_A

PACKAGE⁽¹⁾

ORDERABLE PART NUMBER

TOP-SIDE MARKING⁽²⁾

NanoStar™ – WCSP (DSBGA)

0.23-mm Large Bump – YEP

SN74LVC3GU04YEPR

Reel of 3000

_ _ _CD_

NanoFree™ – WCSP (DSBGA)

0.23-mm Large Bump – YZP (Pb-free)

SN74LVC3GU04YZPR

–40°C to 85°C

SSOP – DCT

Reel of 3000 SN74LVC3GU04DCTR

Reel of 3000 SN74LVC3GU04DCUR

CU4_ _ _

CU4_

VSSOP – DCU

Reel of 250

SN74LVC3GU04DCUT

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.

DCU: The actual top-side marking has one additional character that designates the assembly/test site.

YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoStar, NanoFree are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...11

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与SN74LVC3GU04相关器件

型号	品牌	获取价格	描述	数据表
SN74LVC3GU04DCTR	TI	获取价格	TRIPLE INVERTER GATE
SN74LVC3GU04DCUR	TI	获取价格	TRIPLE INVERTER GATE
SN74LVC3GU04DCUT	TI	获取价格	TRIPLE INVERTER GATE
SN74LVC3GU04YEPR	TI	获取价格	TRIPLE INVERTER GATE
SN74LVC3GU04YZPR	TI	获取价格	TRIPLE INVERTER GATE
SN74LVC4245	TI	获取价格	OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER WITH 3-STATE OUTPUTS
SN74LVC4245A	TI	获取价格	OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER WITH 3-STATE OUTPUTS
SN74LVC4245A_07	TI	获取价格	OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER WITH 3-STATE OUTPUTS
SN74LVC4245A_08	TI	获取价格	OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER WITH 3-STATE OUTPUTS
SN74LVC4245ADB	TI	获取价格	OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER WITH 3-STATE OUTPUTS

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