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SN74LVC1G373YZTR PDF预览

SN74LVC1G373YZTR

更新时间： 2024-09-14 20:08:51
品牌 Logo 应用领域
德州仪器 - TI 驱动输出元件逻辑集成电路
页数 文件大小 规格书
18页 922K
描述
LVC/LCX/Z SERIES, 1-BIT DRIVER, TRUE OUTPUT, BGA6, GREEN, DSBGA-6

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SN74LVC1G373YZTR 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：BGA
包装说明：VFBGA, BGA6,2X3,20针数：6
Reach Compliance Code：compliantHTS代码：8542.39.00.01
Factory Lead Time：1 week风险等级：5.43
系列：LVC/LCX/ZJESD-30 代码：R-XBGA-B6
JESD-609代码：e1长度：1.4 mm
负载电容（CL）：15 pF逻辑集成电路类型：BUS DRIVER
最大I（ol）：0.032 A湿度敏感等级：1
位数：1功能数量：1
端口数量：2端子数量：6
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：UNSPECIFIED封装代码：VFBGA
封装等效代码：BGA6,2X3,20封装形状：RECTANGULAR
封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH包装方法：TAPE AND REEL
峰值回流温度（摄氏度）：260电源：3.3 V
传播延迟（tpd）：16.3 ns认证状态：Not Qualified
座面最大高度：0.5 mm子类别：FF/Latches
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：1.65 V
标称供电电压 (Vsup)：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Tin/Silver/Copper (Sn/Ag/Cu)端子形式：BALL
端子节距：0.5 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：0.9 mm
Base Number Matches：1

SN74LVC1G373YZTR 数据手册

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SN74LVC1G373  
www.ti.com  
SCES528D –DECEMBER 2003–REVISED DECEMBER 2013  
Single D-Type Latch With 3-State Output  
Check for Samples: SN74LVC1G373  
While the latch-enable (LE) input is high, the Q output  
1
FEATURES  
follows the data (D) input. When LE is taken low, the  
Q output is latched at the logic level set up at the D  
input.  
2
•
Available in the Texas Instruments NanoFree™  
Package  
•
•
•
•
•
•
•
Supports 5-V VCC Operation  
NanoFree™ package technology is  
a
major  
Inputs Accept Voltages to 5.5 V  
Provides Down Translation to VCC  
Max tpd of 4 ns at 3.3 V  
breakthrough in IC packaging concepts, using the die  
as the package.  
OE does not affect the internal operations of the  
latch. Old data can be retained or new data can be  
entered while the outputs are in the high-impedance  
state.  
Low Power Consumption, 10-μA Max ICC  
±24-mA Output Drive at 3.3 V  
Ioff Supports Live Insertion, Partial-Power-  
Down Mode, and Back Drive Protection  
A buffered output-enable (OE) input can be used to  
place the output in either a normal logic state (high or  
low logic levels) or the high-impedance state. In the  
high-impedance state, the output neither loads nor  
drives the bus lines significantly. The high-impedance  
state and increased drive provide the capability to  
drive bus lines without interface or pullup  
components.  
•
•
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection Exceeds JESD 22  
–
–
–
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
1000-V Charged-Device Model (C101)  
To ensure the high-impedance state during power up  
or power down, OE should be tied to VCC through a  
pullup resistor; the minimum value of the resistor is  
determined by the current-sinking capability of the  
driver.  
DESCRIPTION  
This single D-type latch is designed for 1.65-V to 5.5-  
V VCC operation.  
The SN74LVC1G373 is particularly suitable for  
implementing buffer registers, I/O ports, bidirectional  
bus drivers, and working registers. While the latch-  
enable (LE) input is high, the Q outputs follow the  
data (D) inputs. When LE is taken low, the Q outputs  
are latched at the logic levels set up at the D inputs.  
This device is fully specified for partial-power-down  
applications using Ioff. The Ioff circuitry disables the  
outputs, preventing damaging current backflow  
through the device when it is powered down.  
DBV PACKAGE  
(TOP VIEW)  
DCK PACKAGE  
(TOP VIEW)  
YZP PACKAGE  
(BOTTOM VIEW)  
3
2
1
4
5
6
D
GND  
LE  
Q
1
2
3
6
5
4
LE  
GND  
D
OE  
1
2
3
6
5
4
LE  
GND  
D
OE  
VCC  
VCC  
OE  
VCC  
Q
Q
See mechanical drawings for dimensions.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoFree is a trademark of Texas Instruments.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2003–2013, Texas Instruments Incorporated  
 
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SN74LVC1G373YZTR 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC1G373DCKR TI

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 SINGLE D-TYPE LATCH
SN74LVC1G373DBVR TI

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 SINGLE D-TYPE LATCH
SN74LVC1G373YZPR TI

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 SINGLE D-TYPE LATCH

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