Datasheet > SN74LVC1G386_15

SN74LVC1G386_15

更新时间： 2024-02-20 16:27:31

品牌	Logo	应用领域
德州仪器 - TI		栅石英晶振
页数	文件大小	规格书
12页	268K
描述
Single 3-Input Positive-XOR Gate

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SN74LVC1G386_15 数据手册

SN74LVC1G386

SINGLE 3-INPUT POSITIVE-XOR GATE

www.ti.com

SCES439C–APRIL 2003–REVISED APRIL 2005

FEATURES

DBV OR DCK PACKAGE

(TOP VIEW)

•

Available in the Texas Instruments

NanoStar ™ and NanoFree™

Packages

GND

•

Supports 5-V V_CCOperation

Inputs Accept Voltages to 5.5 V

I_offSupports Partial-Power-Down Mode

Operation

YEP OR YZP PACKAGE

(BOTTOM VIEW)

•

Latch-Up Performance Exceeds 100 mA

Per JESD 78, Class II

GND

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

DESCRIPTION/ORDERING INFORMATION

The SN74LVC1G386 performs the Boolean function Y = A

C in positive logic.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the

die as the package.

This device is fully specified for partial-power-down applications using I_off. The I_offcircuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

ORDERING INFORMATION

T_A

PACKAGE⁽¹⁾

ORDERABLE PART NUMBER

TOP-SIDE MARKING⁽²⁾

NanoStar™ – WCSP (DSBGA)

0.23-mm Large Bump – YEP

SN74LVC1G386YEPR

Tape and reel

_ _ _C8_

NanoFree™ – WCSP (DSBGA)

0.23-mm Large Bump – YZP (Pb-free)

SN74LVC1G386YZPR

–40°C to 85°C

SOT (SOT-23) – DBV

SOT (SC-70) – DCK

Tape and reel SN74LVC1G386DBVR

Tape and reel SN74LVC1G386DCKR

CC6_

C8_

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2) DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.

YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, = Pb-free).

FUNCTION TABLE

INPUTS

OUTPUT

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoStar, NanoFree are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...12

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与SN74LVC1G386_15相关器件

型号	品牌	获取价格	描述	数据表
SN74LVC1G386DBVR	TI	获取价格	SINGLE 3-INPUT POSITIVE-XOR GATE
SN74LVC1G386DCKR	TI	获取价格	SINGLE 3-INPUT POSITIVE-XOR GATE
SN74LVC1G386DRYR	TI	获取价格	Single 3-Input Positive-XOR Gate 6-SON -40 to 125
SN74LVC1G386DSFR	TI	获取价格	Single 3-Input Positive-XOR Gate 6-SON -40 to 125
SN74LVC1G386YEPR	TI	获取价格	SINGLE 3-INPUT POSITIVE-XOR GATE
SN74LVC1G386YZPR	TI	获取价格	SINGLE 3-INPUT POSITIVE-XOR GATE
SN74LVC1G38DBVR	TI	获取价格	SINGLE 2-INPUT NAND GATE WITH OPEN-DRAIN OUTPUT
SN74LVC1G38DBVRE4	TI	获取价格	具有漏极开路输出的单路 2 输入、1.65V 至 5.5V 与非门 \| DBV \| 5 \|
SN74LVC1G38DBVRG4	TI	获取价格	具有漏极开路输出的单路 2 输入、1.65V 至 5.5V 与非门 \| DBV \| 5 \|
SN74LVC1G38DBVT	TI	获取价格	SINGLE 2-INPUT NAND GATE WITH OPEN-DRAIN OUTPUT

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