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SN74LVC1G373DCKR PDF预览

SN74LVC1G373DCKR

更新时间: 2024-09-08 22:32:23
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器锁存器
页数 文件大小 规格书
13页 237K
描述
SINGLE D-TYPE LATCH

SN74LVC1G373DCKR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:TSSOP, TSSOP6,.08针数:6
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:1.18
控制类型:ENABLE LOW/HIGH计数方向:UNIDIRECTIONAL
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G6
JESD-609代码:e4长度:2 mm
负载电容(CL):30 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.032 A湿度敏感等级:1
位数:1功能数量:1
端口数量:2端子数量:6
最高工作温度:125 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP6,.08封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TR
峰值回流温度(摄氏度):260电源:3.3 V
最大电源电流(ICC):0.01 mAProp。Delay @ Nom-Sup:17 ns
传播延迟(tpd):17 ns认证状态:Not Qualified
座面最大高度:1.1 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
宽度:1.25 mmBase Number Matches:1

SN74LVC1G373DCKR 数据手册

 浏览型号SN74LVC1G373DCKR的Datasheet PDF文件第2页浏览型号SN74LVC1G373DCKR的Datasheet PDF文件第3页浏览型号SN74LVC1G373DCKR的Datasheet PDF文件第4页浏览型号SN74LVC1G373DCKR的Datasheet PDF文件第5页浏览型号SN74LVC1G373DCKR的Datasheet PDF文件第6页浏览型号SN74LVC1G373DCKR的Datasheet PDF文件第7页 
ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈ ꢉꢂ ꢉ  
ꢀꢊ ꢁꢈ ꢄ ꢋ ꢌꢍꢎ ꢏꢐ ꢋ ꢄꢑꢎꢆ ꢒ  
ꢓ ꢊꢎ ꢒ ꢉ ꢍꢀꢎꢑꢎ ꢋ ꢔ ꢕꢎ ꢐꢕ ꢎ  
SCES528A − DECEMBER 2003 − REVISED JUNE 2004  
DBV OR DCK PACKAGE  
(TOP VIEW)  
D
Available in the Texas Instruments  
NanoStarand NanoFreePackages  
D
D
D
D
D
D
D
D
Supports 5-V V  
Operation  
CC  
1
2
3
6
5
4
LE  
GND  
D
OE  
Inputs Accept Voltages to 5.5 V  
V
CC  
Max t of 4 ns at 3.3 V  
pd  
Low Power Consumption, 10-µA Max I  
24-mA Output Drive at 3.3 V  
Q
CC  
YEP OR YZP PACKAGE  
(BOTTOM VIEW)  
I
Supports Partial-Power-Down Mode  
off  
Operation  
3 4  
2 5  
1 6  
D
GND  
LE  
Q
Latch-Up Performance Exceeds 100 mA  
Per JESD 78, Class II  
V
CC  
OE  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
− 1000-V Charged-Device Model (C101)  
description/ordering information  
This single D-type latch is designed for 1.65-V to 5.5-V V  
operation.  
CC  
The SN74LVC1G373 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus  
drivers, and working registers. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs.  
When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs.  
While the latch-enable (LE) input is high, the Q output follows the data (D) input. When LE is taken low, the Q  
output is latched at the logic level set up at the D input.  
NanoStarand NanoFreepackage technology is a major breakthrough in IC packaging concepts, using the  
die as the package.  
OE does not affect the internal operations of the latch. Old data can be retained or new data can be entered  
while the outputs are in the high-impedance state.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
NanoStar− WCSP (DSBGA)  
0.23-mm Large Bump − YEP  
SN74LVC1G373YEPR  
SN74LVC1G373YZPR  
Reel of 3000  
_ _ _D3_  
NanoFree− WCSP (DSBGA)  
0.23-mm Large Bump − YZP (Pb-free)  
−40°C to 85°C  
Reel of 3000  
Reel of 250  
Reel of 3000  
SN74LVC1G373DBVR  
SN74LVC1G373DBVT  
SN74LVC1G373DCKR  
SOT (SOT-23) − DBV  
CA3_  
D3_  
SOT (SC-70) − DCK  
Reel of 250  
SN74LVC1G373DCKT  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.  
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one  
following character to designate the assembly/test site. Pin  
1 identifier indicates solder-bump composition  
(1 = SnPb, = Pb-free).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoStar and NanoFree are trademarks of Texas Instruments.  
ꢎꢢ  
Copyright 2004, Texas Instruments Incorporated  
ꢞꢢ ꢟ ꢞ ꢗꢘ ꢬ ꢚꢙ ꢝ ꢥꢥ ꢣꢝ ꢛ ꢝ ꢜ ꢢ ꢞꢢ ꢛꢟ ꢧ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74LVC1G373DCKR 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC1G373DBVR TI

完全替代

SINGLE D-TYPE LATCH
NC7SZ373P6X FAIRCHILD

完全替代

TinyLogic UHS D-Type Latch with 3-STATE Output

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