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SN74LVC1G11DBVRG4 PDF预览

SN74LVC1G11DBVRG4

更新时间： 2024-11-02 06:12:59
品牌 Logo 应用领域
德州仪器 - TI 输入元件
页数 文件大小 规格书
14页 613K
描述
SINGLE 3-INPUT POSITIVE-AND GATE

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SN74LVC1G11DBVRG4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOT-23
包装说明：LSSOP, TSOP6,.11,37针数：6
Reach Compliance Code：compliantHTS代码：8542.39.00.01
Factory Lead Time：6 weeks风险等级：1.16
Samacsys Description：Logic Gates SNGL 3 Input Pos AND Gate系列：LVC/LCX/Z
JESD-30 代码：R-PDSO-G6JESD-609代码：e4
长度：2.9 mm负载电容（CL）：50 pF
逻辑集成电路类型：AND GATE最大I（ol）：0.032 A
湿度敏感等级：1功能数量：1
输入次数：3端子数量：6
最高工作温度：125 °C最低工作温度：-40 °C
输出特性：3-STATE封装主体材料：PLASTIC/EPOXY
封装代码：LSSOP封装等效代码：TSOP6,.11,37
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
包装方法：TR峰值回流温度（摄氏度）：260
电源：3.3 V最大电源电流（ICC）：0.01 mA
Prop。Delay @ Nom-Sup：4.9 ns传播延迟（tpd）：17.2 ns
认证状态：Not Qualified施密特触发器：NO
座面最大高度：1.45 mm子类别：Gates
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：1.65 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：AUTOMOTIVE
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.95 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：1.6 mm

SN74LVC1G11DBVRG4 数据手册

 浏览型号SN74LVC1G11DBVRG4的Datasheet PDF文件第2页浏览型号SN74LVC1G11DBVRG4的Datasheet PDF文件第3页浏览型号SN74LVC1G11DBVRG4的Datasheet PDF文件第4页浏览型号SN74LVC1G11DBVRG4的Datasheet PDF文件第5页浏览型号SN74LVC1G11DBVRG4的Datasheet PDF文件第6页浏览型号SN74LVC1G11DBVRG4的Datasheet PDF文件第7页 
SN74LVC1G11  
SINGLE 3-INPUT POSITIVE-AND GATE  
www.ti.com  
SCES487D–SEPTEMBER 2003–REVISED JANUARY 2007  
FEATURES  
•
Available in the Texas Instruments  
NanoFree™ Package  
Operation  
•
•
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
•
•
•
•
•
•
Supports 5-V VCC Operation  
Inputs Accept Voltages to 5.5 V  
Max tpd of 4.1 ns at 3.3 V  
ESD Protection Exceeds JESD 22  
–
–
–
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
Low Power Consumption, 10-µA Max ICC  
±24-mA Output Drive at 3.3 V  
Ioff Supports Partial-Power-Down Mode  
1000-V Charged-Device Model (C101)  
DESCRIPTION/ORDERING INFORMATION  
Y + A • B • C or Y + A ) B ) C  
The SN74LVC1G11 performs the Boolean function  
in positive logic.  
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the  
package.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING(2)  
NanoFree™ – WCSP (DSBGA)  
0.23-mm Large Bump – YZP (Pb-free)  
Reel of 3000 SN74LVC1G11YZPR  
_ _ _C3_  
–40°C to 85°C  
SOT (SOT-23) – DBV  
SOT (SC-70) – DCK  
Reel of 3000 SN74LVC1G11DBVR  
Reel of 3000 SN74LVC1G11DCKR  
C11_  
C3_  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
(2) DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.  
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following  
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoFree is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2003–2007, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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SN74LVC1G11DBVRG4 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC1G11DCKRG4 TI

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 SINGLE 3-INPUT POSITIVE-AND GATE
SN74LVC1G11DCKR TI

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 SINGLE 3 INPUT POSITIVE AND GATE
SN74LVC1G11DBVR TI

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 SINGLE 3 INPUT POSITIVE AND GATE

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