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SN74LVC1G11YZP PDF预览

SN74LVC1G11YZP

更新时间： 2024-11-20 20:41:31
品牌 Logo 应用领域
德州仪器 - TI 栅逻辑集成电路
页数 文件大小 规格书
30页 1322K
描述
AND Gate

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SN74LVC1G11YZP 技术参数

生命周期：Obsolete包装说明：VFBGA,
Reach Compliance Code：compliant风险等级：5.67
系列：LVC/LCX/ZJESD-30 代码：R-PBGA-B6
长度：1.388 mm逻辑集成电路类型：AND GATE
功能数量：1输入次数：3
端子数量：6最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：VFBGA封装形状：RECTANGULAR
封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH传播延迟（tpd）：17.2 ns
座面最大高度：0.5 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：1.65 V标称供电电压 (Vsup)：1.8 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：BALL
端子节距：0.5 mm端子位置：BOTTOM
宽度：0.888 mmBase Number Matches：1

SN74LVC1G11YZP 数据手册

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Sample &  
Buy  
Support &  
Community  
Reference  
Design  
Product  
Folder  
Tools &  
Software  
Technical  
Documents  
SN74LVC1G11  
SCES487H –SEPTEMBER 2003–REVISED NOVEMBER 2016  
SN74LVC1G11 Single 3-Input Positive-AND Gate  
1 Features  
3 Description  
The SN74LVC1G11 performs the Boolean function  
1
•
Latch-Up Performance Exceeds 100 mA  
Per JESD 78, Class II  
C
Y = A • B • C or Y = A + B +  
in positive logic.  
•
ESD Protection Exceeds JESD 22  
NanoFree package technology is  
a
major  
breakthrough in IC packaging concepts, using the die  
as the package.  
–
–
2000-V Human-Body Model (A114-A)  
1000-V Charged-Device Model (C101)  
This device is fully specified for partial-power-down  
applications using Ioff. The Ioff circuitry disables the  
outputs, preventing damaging current backflow  
through the device when it is powered down.  
•
Available in the Texas Instruments  
NanoFree™ Package  
•
•
•
•
•
•
Supports 5-V VCC Operation  
Inputs Accept Voltages to 5.5 V  
Device Information(1)  
Maximum tpd of 4.1 ns at 3.3 V  
PART NUMBER  
PACKAGE  
BODY SIZE (NOM)  
2.90 mm × 1.60 mm  
2.00 mm × 1.25 mm  
1.45 mm × 1.00 mm  
1.00 mm × 1.00 mm  
1.41 mm × 0.91 mm  
Low Power Consumption, 10-μA Maximum ICC  
±24-mA Output Drive at 3.3 V  
SN74LVC1G11DBV SOT-23 (6)  
SN74LVC1G11DCK SC70 (6)  
SN74LVC1G11DRY SON (6)  
SN74LVC1G11DSF SON (6)  
SN74LVC1G11YZP DSBGA (6)  
Ioff Supports Partial-Power-Down Mode Operation  
2 Applications  
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
AV Receivers  
(1) For all available packages, see the orderable addendum at  
the end of the data sheet.  
DLP Front Projection System  
Digital Picture Frames  
Digital Radio  
Logic Diagram (Positive Logic)  
A
Digital Still Cameras  
Y
B
Digital Video Cameras (DVC)  
Embedded PCs  
C
E-Books  
Ethernet Switchs  
GPS: Personal Navigation Devices  
Handset: Smartphones  
High-Speed Data Acquisition and Generation  
Military: Radar and Sonar  
Mobile Internet Devices  
Notebook PC and Netbooks  
Network-Attached Storage (NAS)  
Power Line Communication Modems  
Server PSU  
STB, DVR, and Streaming Media  
Speakers: USB  
Tablets: Enterprise  
Video Broadcasting and Infrastructure: Scalable  
Platform and IP-Based Multi-Format Transcoders  
•
Wireless Headsets, Keyboards, and Mice  
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 
 
 
 
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