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SN74AUC16244_08

更新时间： 2024-09-14 05:17:39
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德州仪器 - TI 驱动器输出元件
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14页 468K
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16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

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SN74AUC16244_08 数据手册

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SN74AUC16244  
16-BIT BUFFER/DRIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES399E–JULY 2002–REVISED FEBRUARY 2008  
1
FEATURES  
DGG OR DGV PACKAGE  
(TOP VIEW)  
2
•
Member of the Texas Instruments Widebus™  
Family  
1OE  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
VCC  
2Y1  
2Y2  
2OE  
1A1  
•
•
Optimized for 1.8-V Operation and Is 3.6-V I/O  
Tolerant to Support Mixed-Mode Signal  
Operation  
1
2
3
4
5
6
7
8
9
48  
47  
46 1A2  
GND  
1A3  
1A4  
VCC  
45  
44  
43  
42  
Ioff Supports Partial-Power-Down Mode  
Operation  
•
•
•
•
•
Sub-1-V Operable  
Max tpd of 2 ns at 1.8 V  
41 2A1  
40 2A2  
39 GND  
Low Power Consumption, 20-µA Max ICC  
±8-mA Output Drive at 1.8 V  
GND 10  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
2Y3  
2Y4  
3Y1  
2A3  
2A4  
3A1  
11  
12  
13  
38  
37  
36  
•
ESD Protection Exceeds JESD 22  
3Y2 14  
GND 15  
3Y3 16  
3Y4 17  
35 3A2  
34 GND  
33 3A3  
32 3A4  
–
–
–
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
1000-V Charged-Device Model (C101)  
VCC  
VCC  
18  
31  
DESCRIPTION/ORDERING INFORMATION  
4Y1 19  
4Y2 20  
GND 21  
4Y3 22  
4Y4 23  
4OE 24  
30 4A1  
29 4A2  
28 GND  
27 4A3  
26 4A4  
25 3OE  
This 16-bit buffer/driver is operational at 0.8-V to  
2.7-V VCC, but is designed specifically for 1.65-V to  
1.95-V VCC operation.  
The SN74AUC16244 is designed specifically to  
improve the performance and density of 3-state  
memory address drivers, clock drivers, and  
bus-oriented receivers and transmitters.  
The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and  
symmetrical active-low output-enable (OE) inputs.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
TA  
PACKAGE(1)(2)  
ORDERABLE PART NUMBER  
SN74AUC16244DGGR  
TOP-SIDE MARKING  
AUC16244  
MH244  
TSSOP – DGG  
TVSOP – DGV  
VFBGA – GQL  
Tape and reel  
–40C to 85C  
Tape and reel  
Tape and reel  
SN74AUC16244DGVR  
SN74AUC16244GQLR  
MH244  
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.  
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
website at www.ti.com.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
Widebus is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2002–2008, Texas Instruments Incorporated  
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