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SN74AUC16501DGV

更新时间： 2024-09-13 23:03:11
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
13页 233K
描述
18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

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SN74AUC16501DGV 数据手册

 浏览型号SN74AUC16501DGV的Datasheet PDF文件第2页浏览型号SN74AUC16501DGV的Datasheet PDF文件第3页浏览型号SN74AUC16501DGV的Datasheet PDF文件第4页浏览型号SN74AUC16501DGV的Datasheet PDF文件第5页浏览型号SN74AUC16501DGV的Datasheet PDF文件第6页浏览型号SN74AUC16501DGV的Datasheet PDF文件第7页 
SN74AUC16501  
18-BIT UNIVERSAL BUS TRANSCEIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES418–DECEMBER 2002–REVISED JUNE 2005  
FEATURES  
DGG OR DGV PACKAGE  
(TOP VIEW)  
•
Member of the Texas Instruments Widebus™  
Family  
OEAB  
LEAB  
A1  
GND  
A2  
GND  
CLKAB  
1
2
3
4
5
6
7
8
9
56  
55  
•
Optimized for 1.8-V Operation and Is 3.6-V I/O  
Tolerant to Support Mixed-Mode Signal  
Operation  
54 B1  
GND  
53  
52  
51  
50  
•
Ioff Supports Partial-Power-Down Mode  
Operation  
B2  
B3  
V
A3  
•
•
•
•
•
Sub-1-V Operable  
V
CC  
CC  
Max tpd of 2 ns at 1.8 V  
A4  
A5  
A6 10  
GND  
A7  
A8  
49 B4  
48 B5  
47 B6  
Low Power Consumption, 10 µA at 1.8 V  
±8-mA Output Drive at 1.8 V  
GND  
B7  
B8  
11  
12  
13  
46  
45  
44  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
•
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
A9 14  
A10 15  
A11 16  
A12 17  
43 B9  
42 B10  
41 B11  
40 B12  
– 1000-V Charged-Device Model (C101)  
GND  
GND  
18  
39  
DESCRIPTION/ORDERING INFORMATION  
A13 19  
A14 20  
A15 21  
38 B13  
37 B14  
36 B15  
This 18-bit universal bus transceiver is operational at  
0.8-V to 2.7-V VCC, but is designed specifically for  
1.65-V to 1.95-V VCC operation.  
V
CC  
22  
35  
V
CC  
A16 23  
A17 24  
34 B16  
Data flow in each direction is controlled by  
output-enable (OEAB and OEBA), latch-enable  
(LEAB and LEBA), and clock (CLKAB and CLKBA)  
inputs. For A-to-B data flow, the device operates in  
the transparent mode when LEAB is high. When  
LEAB is low, the A data is latched if CLKAB is held at  
a high or low logic level. If LEAB is low, the A data is  
stored in the latch/flip-flop on the low-to-high  
transition of CLKAB. When OEAB is high, the outputs  
are active. When OEAB is low, the outputs are in the  
high-impedance state.  
33 B17  
GND 25  
A18 26  
32 GND  
31 B18  
OEBA 27  
LEBA 28  
30 CLKBA  
29 GND  
Data flow for B to A is similar to that of A to B, but uses OEBA, LEBA, and CLKBA. The output enables are  
complementary (OEAB is active high and OEBA is active low).  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74AUC16501DGGR  
TOP-SIDE MARKING  
AUC16501  
TSSOP – DGG  
TVSOP – DGV  
VFBGA – GQL  
Tape and reel  
–40°C to 85°C  
Tape and reel  
Tape and reel  
SN74AUC16501DGVR  
MH501  
MH501  
SN74AUC16501GQLR  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2002–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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