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SN74AUC17 PDF预览

SN74AUC17

更新时间: 2024-09-14 09:15:27
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
8页 175K
描述
HEX SCHMITT-TRIGGER BUFFER

SN74AUC17 数据手册

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SN74AUC17  
HEX SCHMITT-TRIGGER BUFFER  
www.ti.com  
SCES497AOCTOBER 2003REVISED MARCH 2005  
FEATURES  
RGY PACKAGE  
(TOP VIEW)  
Optimized for 1.8-V Operation and Is 3.6-V I/O  
Tolerant to Support Mixed-Mode Signal  
Operation  
Ioff Supports Partial-Power-Down Mode  
Operation  
1
14  
1Y  
2A  
2Y  
3A  
3Y  
13 6A  
2
3
4
5
6
Sub-1-V Operable  
12  
11  
10  
9
6Y  
5A  
5Y  
4A  
Max tpd of 1.8 ns at 1.8 V  
Low Power Consumption, 10-µA Max ICC  
±8-mA Output Drive at 1.8 V  
7
8
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
– 1000-V Charged-Device Model (C101)  
DESCRIPTION/ORDERING INFORMATION  
This hex Schmitt-trigger buffer is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to  
1.95-V VCC operation.  
The SN74AUC17 contains six independent buffers and performs the Boolean function Y = A. The device  
functions as six independent buffers, but because of Schmitt action, it may have different input threshold levels  
for positive-going (VT+) and negative-going (VT–) signals.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING  
–40°C to 85°C  
QFN – RGY  
Tape and reel  
SN74AUC17RGYR  
MS17  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
FUNCTION TABLE  
(EACH INVERTER)  
INPUT  
A
OUTPUT  
Y
H
L
H
L
LOGIC DIAGRAM, EACH BUFFER (POSITIVE LOGIC)  
A
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2003–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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AUC SERIES, 2-INPUT NAND GATE, PDSO5, GREEN, PLASTIC, SC-70, 5 PIN