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SN74AUC16245DGGR PDF预览

SN74AUC16245DGGR

更新时间： 2024-11-19 22:29:35
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
9页 224K
描述
16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

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SN74AUC16245DGGR 数据手册

 浏览型号SN74AUC16245DGGR的Datasheet PDF文件第2页浏览型号SN74AUC16245DGGR的Datasheet PDF文件第3页浏览型号SN74AUC16245DGGR的Datasheet PDF文件第4页浏览型号SN74AUC16245DGGR的Datasheet PDF文件第5页浏览型号SN74AUC16245DGGR的Datasheet PDF文件第6页浏览型号SN74AUC16245DGGR的Datasheet PDF文件第7页 
SN74AUC16245  
16-BIT BUS TRANSCEIVER  
WITH 3-STATE OUTPUTS  
SCES392E – MARCH 2002 – REVISED DECEMBER 2002  
DGG OR DGV PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
Optimized for 1.8-V Operation and is 3.6-V  
I/O Tolerant to Support Mixed-Mode Signal  
Operation  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1DIR  
1B1  
1B2  
GND  
1B3  
1B4  
1OE  
1A1  
1A2  
GND  
1A3  
1A4  
2
3
I
Supports Partial-Power-Down Mode  
off  
4
Operation  
5
Sub 1-V Operable  
6
7
Max t of 2 ns at 1.8 V  
pd  
V
V
CC  
CC  
8
1B5  
1B6  
GND  
1B7  
1B8  
2B1  
2B2  
GND  
2B3  
2B4  
1A5  
1A6  
GND  
1A7  
1A8  
2A1  
2A2  
GND  
2A3  
2A4  
Low Power Consumption, 20-µA Max I  
±8-mA Output Drive at 1.8 V  
CC  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
– 1000-V Charged-Device Model (C101)  
description/ordering information  
V
V
CC  
CC  
2B5  
2B6  
GND  
2B7  
2B8  
2A5  
2A6  
GND  
2A7  
2A8  
2OE  
This 16-bit (dual-octal) noninverting bus  
transceiver is operational at 0.8-V to 2.7-V V  
but is designed specifically for 1.65-V to 1.95-V  
,
CC  
V
operation.  
CC  
The  
SN74AUC16245  
is  
designed  
for  
2DIR  
asynchronous communication between data  
buses. The control-function implementation  
minimizes external timing requirements.  
This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the  
A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR)  
input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
†
T
PACKAGE  
TSSOP – DGG  
A
MARKING  
AUC16245  
MH245  
Tape and reel  
Tape and reel  
Tape and reel  
SN74AUC16245DGGR  
SN74AUC16245DGVR  
SN74AUC16245GQLR  
–40°C to 85°C TVSOP – DGV  
VFBGA – GQL  
MH245  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
Copyright 2002, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...9

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SN74AUC16245DGGR 替代型号

型号 品牌 替代类型 描述 数据表
SN74AUC16245DGVR TI

完全替代

 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SN74AUC16244GQLR TI

完全替代

 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74AUC16240DGGR TI

类似代替

 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

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