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SN74ALVCH16374DGVR PDF预览

SN74ALVCH16374DGVR

更新时间： 2024-11-21 05:29:35
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器触发器逻辑集成电路电视光电二极管输出元件
页数 文件大小 规格书
14页 318K
描述
16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

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SN74ALVCH16374DGVR 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：SOIC
包装说明：TVSOP-48针数：48
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：6 weeks
风险等级：1.46Is Samacsys：N
控制类型：INDEPENDENT CONTROL计数方向：UNIDIRECTIONAL
系列：ALVC/VCX/AJESD-30 代码：R-PDSO-G48
JESD-609代码：e4长度：9.7 mm
负载电容（CL）：50 pF逻辑集成电路类型：BUS DRIVER
最大频率@ Nom-Sup：150000000 Hz最大I（ol）：0.024 A
湿度敏感等级：1位数：8
功能数量：2端口数量：2
端子数量：48最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP48,.25,16
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法：TR峰值回流温度（摄氏度）：260
电源：3.3 V最大电源电流（ICC）：0.04 mA
Prop。Delay @ Nom-Sup：4.2 ns传播延迟（tpd）：5.3 ns
认证状态：Not Qualified座面最大高度：1.2 mm
子类别：Bus Driver/Transceiver最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：1.65 V标称供电电压 (Vsup)：1.8 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.4 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
翻译：N/A触发器类型：POSITIVE EDGE
宽度：4.4 mmBase Number Matches：1

SN74ALVCH16374DGVR 数据手册

 浏览型号SN74ALVCH16374DGVR的Datasheet PDF文件第2页浏览型号SN74ALVCH16374DGVR的Datasheet PDF文件第3页浏览型号SN74ALVCH16374DGVR的Datasheet PDF文件第4页浏览型号SN74ALVCH16374DGVR的Datasheet PDF文件第5页浏览型号SN74ALVCH16374DGVR的Datasheet PDF文件第6页浏览型号SN74ALVCH16374DGVR的Datasheet PDF文件第7页 
SN74ALVCH16374  
16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES021L–JULY 1995–REVISED SEPTEMBER 2004  
FEATURES  
DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
•
Member of the Texas Instruments Widebus™  
Family  
1CLK  
1D1  
1D2  
GND  
1D3  
1D4  
1OE  
1Q1  
1Q2  
GND  
1Q3  
1Q4  
1
2
3
4
5
6
7
8
9
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
•
•
•
•
Operates From 1.65 to 3.6 V  
Max tpd of 4.2 ns at 3.3 V  
±24-mA Output Drive at 3.3 V  
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
•
•
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
V
CC  
V
CC  
1D5  
1D6  
GND  
1D7  
1D8  
2D1  
2D2  
GND  
2D3  
2D4  
1Q5  
1Q6  
GND 10  
1Q7  
1Q8  
2Q1  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
11  
12  
13  
DESCRIPTION/ORDERING INFORMATION  
2Q2 14  
GND 15  
2Q3 16  
2Q4 17  
This 16-bit edge-triggered D-type flip-flop is designed  
for 1.65-V to 3.6-V VCC operation.  
The SN74ALVCH16374 is particularly suitable for  
implementing buffer registers, I/O ports, bidirectional  
bus drivers, and working registers. It can be used as  
two 8-bit flip-flops or one 16-bit flip-flop. On the  
positive transition of the clock (CLK) input, the  
Q outputs of the flip-flop take on the logic levels at  
the data (D) inputs. OE can be used to place the  
eight outputs in either a normal logic state (high or  
low logic levels) or the high-impedance state. In the  
high-impedance state, the outputs neither load nor  
drive the bus lines significantly. The high-impedance  
state and the increased drive provide the capability to  
drive bus lines without need for interface or pullup  
components.  
V
CC  
V
CC  
18  
2D5  
2D6  
GND  
2D7  
2D8  
2CLK  
2Q5 19  
2Q6 20  
GND 21  
2Q7 22  
2Q8 23  
2OE 24  
OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while  
the outputs are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors  
with the bus-hold circuitry is not recommended.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1995–2004, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...14

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SN74ALVCH16374DGVR 替代型号

型号 品牌 替代类型 描述 数据表
74ALVCH16374DGVRE4 TI

类似代替

 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

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