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SN74ALVCH16501KR PDF预览

SN74ALVCH16501KR

更新时间： 2024-11-09 05:29:35
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
13页 297K
描述
18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

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中文翻译

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SN74ALVCH16501KR 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：BGA
包装说明：VFBGA, BGA56,6X10,25针数：56
Reach Compliance Code：not_compliantHTS代码：8542.39.00.01
Factory Lead Time：1 week风险等级：8.51
其他特性：WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION控制类型：INDEPENDENT CONTROL
计数方向：BIDIRECTIONAL系列：ALVC/VCX/A
JESD-30 代码：R-PBGA-B56JESD-609代码：e0
长度：7 mm逻辑集成电路类型：REGISTERED BUS TRANSCEIVER
最大I（ol）：0.024 A湿度敏感等级：1
位数：18功能数量：1
端口数量：2端子数量：56
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：VFBGA
封装等效代码：BGA56,6X10,25封装形状：RECTANGULAR
封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH包装方法：TAPE AND REEL
峰值回流温度（摄氏度）：240电源：3.3 V
Prop。Delay @ Nom-Sup：3.9 ns传播延迟（tpd）：6.1 ns
认证状态：Not Qualified座面最大高度：1 mm
子类别：Bus Driver/Transceivers最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：1.65 V标称供电电压 (Vsup)：2.5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：BALL端子节距：0.65 mm
端子位置：BOTTOM处于峰值回流温度下的最长时间：NOT SPECIFIED
翻译：N/A触发器类型：POSITIVE EDGE
宽度：4.5 mmBase Number Matches：1

SN74ALVCH16501KR 数据手册

 浏览型号SN74ALVCH16501KR的Datasheet PDF文件第2页浏览型号SN74ALVCH16501KR的Datasheet PDF文件第3页浏览型号SN74ALVCH16501KR的Datasheet PDF文件第4页浏览型号SN74ALVCH16501KR的Datasheet PDF文件第5页浏览型号SN74ALVCH16501KR的Datasheet PDF文件第6页浏览型号SN74ALVCH16501KR的Datasheet PDF文件第7页 
SN74ALVCH16501  
18-BIT UNIVERSAL BUS TRANSCEIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES024J–JULY 1995–REVISED OCTOBER 2004  
FEATURES  
DGG OR DL PACKAGE  
(TOP VIEW)  
•
Member of the Texas Instruments Widebus™  
Family  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
OEAB  
LEAB  
A1  
GND  
A2  
GND  
CLKAB  
B1  
GND  
B2  
•
UBT™ Transceiver Combines D-Type Latches  
and D-Type Flip-Flops for Operation in  
Transparent, Latched, or Clocked Modes  
2
3
4
•
•
•
•
Operates From 1.65 V to 3.6 V  
Max tpd of 3.9 ns at 3.3 V  
5
6
A3  
B3  
±24-mA Output Drive at 3.3 V  
7
V
CC  
V
CC  
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
8
A4  
A5  
A6  
GND  
A7  
A8  
B4  
B5  
B6  
GND  
B7  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
•
•
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
ESD Protection Exceeds JESD 22  
- 2000-V Human-Body Model (A114-A)  
- 200-V Machine Model (A115-A)  
B8  
A9  
B9  
A10  
A11  
A12  
GND  
A13  
A14  
A15  
B10  
B11  
B12  
GND  
B13  
B14  
B15  
DESCRIPTION/ORDERING INFORMATION  
This 18-bit universal bus transceiver is designed for  
1.65-V to 3.6-V VCC operation.  
Data flow in each direction is controlled by  
output-enable (OEAB and OEBA), latch-enable  
(LEAB and LEBA), and clock (CLKAB and CLKBA)  
inputs. For A-to-B data flow, the device operates in  
the transparent mode when LEAB is high. When  
LEAB is low, the A data is latched if CLKAB is held at  
a high or low logic level. If LEAB is low, the A data is  
stored in the latch/flip-flop on the low-to-high  
transition of CLKAB. When OEAB is high, the outputs  
are active. When OEAB is low, the outputs are in the  
high-impedance state.  
V
CC  
V
CC  
A16  
A17  
B16  
B17  
GND  
A18  
OEBA  
LEBA  
GND  
B18  
CLKBA  
GND  
Data flow for B to A is similar to that of A to B, but uses OEBA, LEBA, and CLKBA. The output enables are  
complementary (OEAB is active high, and OEBA is active low).  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74ALVCH16501DL  
TOP-SIDE MARKING  
ALVCH16501  
ALVCH16501  
VH501  
Tube  
SSOP - DL  
Tape and reel  
Tape and reel  
SN74ALVCH16501DLR  
SN74ALVCH16501DGGR  
SN74ALVCH16501KR  
-40°C to 85°C  
TSSOP - DGG  
VFBGA - GQL  
Tape and reel  
VFBGA - ZQL (Pb-free)  
74ALVCH16501ZQLR  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus, UBT are trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1995–2004, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...13

中文翻译

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SN74ALVCH16501KR 替代型号

型号 品牌 替代类型 描述 数据表
74ALVCH16501ZQLR TI

完全替代

 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

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