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SN65LVDS32DRG4 PDF预览

SN65LVDS32DRG4

更新时间： 2024-11-18 05:25:03
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德州仪器 - TI /
页数 文件大小 规格书
31页 1018K
描述
HIGH-SPEED DIFFERENTIAL LINE RECEIVERS

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中文翻译

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SN65LVDS32DRG4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOIC
包装说明：SOP, SOP16,.25针数：16
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.06
差分输出：NO高电平输入电流最大值：0.00001 A
输入特性：DIFFERENTIAL接口集成电路类型：LINE RECEIVER
接口标准：EIA-644; TIA-644JESD-30 代码：R-PDSO-G16
JESD-609代码：e4长度：9.9 mm
湿度敏感等级：1功能数量：4
端子数量：16最高工作温度：85 °C
最低工作温度：-40 °C最大输出低电流：0.008 A
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP16,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：260
电源：3.3 V认证状态：Not Qualified
最大接收延迟：3 ns接收器位数：4
座面最大高度：1.75 mm子类别：Line Driver or Receivers
最大压摆率：18 mA最大供电电压：3.6 V
最小供电电压：3 V标称供电电压：3.3 V
电源电压1-最大：3.6 V电源电压1-分钟：3 V
电源电压1-Nom：3.3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：3.9 mm
Base Number Matches：1

SN65LVDS32DRG4 数据手册

 浏览型号SN65LVDS32DRG4的Datasheet PDF文件第2页浏览型号SN65LVDS32DRG4的Datasheet PDF文件第3页浏览型号SN65LVDS32DRG4的Datasheet PDF文件第4页浏览型号SN65LVDS32DRG4的Datasheet PDF文件第5页浏览型号SN65LVDS32DRG4的Datasheet PDF文件第6页浏览型号SN65LVDS32DRG4的Datasheet PDF文件第7页 
SN55LVDS32, SN65LVDS32  
SN65LVDS3486, SN65LVDS9637  
www.ti.com  
SLLS262N–JULY 1997–REVISED MARCH 2004  
HIGH-SPEED DIFFERENTIAL LINE RECEIVERS  
FEATURES  
SN55LVDS32 . . . J OR W  
SN65LVDS32 . . . D OR PW  
(Marked as LVDS32 or 65LVDS32)  
(TOP VIEW)  
•
Meet or Exceed the Requirements of ANSI  
TIA/EIA-644 Standard  
•
•
Operate With a Single 3.3-V Supply  
1B  
1A  
1Y  
VCC  
4B  
4A  
4Y  
G
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
Designed for Signaling Rate of up to 400  
Mbps  
•
•
•
Differential Input Thresholds ±100 mV Max  
Typical Propagation Delay Time of 2.1 ns  
G
2Y  
2A  
11 3Y  
Power Dissipation 60 mW Typical Per  
Receiver at 200 MHz  
10  
9
2B  
GND  
3A  
3B  
•
•
•
Bus-Terminal ESD Protection Exceeds 8 kV  
Low-Voltage TTL (LVTTL) Logic Output Levels  
SN55LVDS32FK  
(TOP VIEW)  
Pin Compatible With AM26LS32, MC3486, and  
µA9637  
•
Open-Circuit Fail-Safe  
3
4
2
1
20 19  
1Y  
G
4A  
4Y  
NC  
G
18  
17  
16  
15  
14  
DESCRIPTION  
5
6
7
The SN55LVDS32, SN65LVDS32, SN65LVDS3486,  
and SN65LVDS9637 are differential line receivers  
that implement the electrical characteristics of  
low-voltage differential signaling (LVDS). This  
signaling technique lowers the output voltage levels  
of 5-V differential standard levels (such as  
EIA/TIA-422B) to reduce the power, increase the  
switching speeds, and allow operation with a 3.3-V  
supply rail. Any of the four differential receivers  
provides a valid logical output state with a ±100-mV  
differential  
common-mode  
common-mode voltage range allows 1 V of ground  
potential difference between two LVDS nodes.  
NC  
2Y  
2A  
3Y  
8
9
10 11 12 13  
SN65LVDS3486D (Marked as LVDS3486)  
(TOP VIEW)  
1B  
1A  
1Y  
VCC  
4B  
4A  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
input  
voltage  
voltage  
within  
range.  
the  
The  
input  
input  
1,2EN  
2Y  
4Y  
3,4EN  
3Y  
The intended application of these devices and  
signaling technique is both point-to-point and  
multidrop (one driver and multiple receivers) data  
transmission over controlled impedance media of  
approximately 100 Ω. The transmission media may  
be printed-circuit board traces, backplanes, or cables.  
The ultimate rate and distance ofdata transfer  
depends on the attenuation characteristics of the  
media and the noise coupling to the environment.  
2A  
2B  
GND  
10 3A  
3B  
9
SN65LVDS9637D (Marked as DK637 or LVDS37)  
SN65LVDS9637DGN (Marked as L37)  
SN65LVDS9637DGK (Marked as AXF)  
(TOP VIEW)  
VCC  
1Y  
2Y  
1A  
1B  
2A  
2B  
1
2
3
4
8
7
6
5
The  
SN65LVDS32,  
SN65LVDS3486,  
and  
SN65LVDS9637 are characterized for operation from  
–40°C to 85°C. The SN55LVDS32 is characterized  
for operation from –55°C to 125°C.  
GND  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PowerPAD is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1997–2004, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...31

中文翻译

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SN65LVDS32DRG4 替代型号

型号 品牌 替代类型 描述 数据表
SN65LVDS31D TI

完全替代

 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
SN65LVDS32D TI

类似代替

 HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
AM26C32ID TI

类似代替

 QUADRUPLE DIFFERENTIAL LINE RECEIVERS

与SN65LVDS32DRG4相关器件

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SN65LVDS32NSR TI

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 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDS32NSRG4 TI

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 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDS32PW TI

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 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDS32PWG4 TI

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 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDS32PWR TI

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 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDS32PWRG4 TI

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 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDS33 TI

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 		HIGH SPEED DIFFERENTIAL RECEIVERS
SN65LVDS33_07 TI

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 		HIGH-SPEED DIFFERENTIAL RECEIVERS

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