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SN65LVDS34 PDF预览

SN65LVDS34

更新时间: 2024-11-17 23:03:07
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HIGH SPEED DIFFERENTIAL RECEIVERS

SN65LVDS34 数据手册

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ꢀꢁꢂ ꢃ ꢄꢅꢆꢀ ꢇ ꢇ ꢈ ꢀꢁꢂ ꢃ ꢄꢅꢆꢉ ꢇ ꢇ ꢈ ꢀꢁꢂ ꢃ ꢄꢅꢆꢀ ꢇ ꢊ ꢈ ꢀꢁꢂ ꢃꢄꢅ ꢆꢉ ꢇꢊ  
ꢋꢌ ꢍꢋ ꢎꢀꢏꢐ ꢐꢆ ꢆꢌ ꢑꢑ ꢐꢒ ꢐꢁꢉ ꢌꢓ ꢄ ꢒꢐ ꢔꢐ ꢌ ꢅꢐ ꢒ ꢀ  
SLLS490B − MARCH 2001 − REVISED NOVEMBER 2004  
1
SN65LVDS33D  
SN65LVDT33D  
SN65LVDS33PW  
SN65LVDT33PW  
D
400-Mbps Signaling Rate and 200-Mxfr/s  
Data Transfer Rate  
D
Operates With a Single 3.3-V Supply  
D
−4-V to 5-V Common-Mode Input Voltage  
Range  
D OR PW PACKAGE  
(TOP VIEW)  
logic diagram (positive logic)  
G
D
D
D
D
D
D
D
Differential Input Thresholds < 50 mV With  
50 mV of Hysteresis Over Entire  
Common-Mode Input Voltage Range  
1B  
1A  
1Y  
G
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
G
4B  
4A  
4Y  
G
SN65LVDT33 ONLY  
1A  
1Y  
1B  
Integrated 110-Line Termination  
Resistors On LVDT Products  
2Y  
2A  
2B  
TSSOP Packaging (33 Only)  
11 3Y  
10 3A  
2A  
Complies With TIA/EIA-644 (LVDS)  
2Y  
2B  
Active Failsafe Assures a High-Level  
Output With No Input  
9
GND  
3B  
3A  
3Y  
Bus-Pin ESD Protection Exceeds  
15 kV HBM  
3B  
4A  
Input Remains High-Impedance on Power  
Down  
4Y  
4B  
D
TTL Inputs Are 5-V Tolerant  
D
Pin-Compatible With the AM26LS32,  
SN65LVDS32B, µA9637, SN65LVDS9637B  
SN65LVDS34D  
SN65LVDT34D  
D PACKAGE  
(TOP VIEW)  
description  
logic diagram (positive logic)  
V
1A  
1B  
2A  
2B  
1
2
3
4
8
7
6
5
This family of four LVDS data line receivers offers  
CC  
1A  
1Y  
2Y  
the widest common-mode input voltage range in  
the industry. These receivers provide an input  
voltage range specification compatible with a 5-V  
PECL signal as well as an overall increased  
ground-noise tolerance. They are in industry  
standard footprints with integrated termination as  
an option.  
1Y  
2Y  
1B  
SN65LVDT34 ONLY  
GND  
2A  
2B  
Precise control of the differential input voltage  
thresholds allows for inclusion of 50 mV of input  
voltage hysteresis to improve noise rejection on  
slowly changing input signals. The input thresh-  
olds are still no more than 50 mV over the full  
input common-mode voltage range.  
AVAILABLE OPTIONS  
NUMBER  
PART NUMBER  
TERMINATION  
SYMBOLIZATION  
OF  
RESISTOR  
RECEIVERS  
SN65LVDS33D  
4
4
4
4
2
2
No  
No  
LVDS33  
LVDS33  
LVDT33  
LVDT33  
LVDS34  
LVDT34  
SN65LVDS33PW  
SN65LVDT33D  
SN65LVDT33PW  
SN65LVDS34D  
SN65LVDT34D  
Yes  
Yes  
No  
The high-speed switching of LVDS signals usually  
necessitates the use of a line impedance  
matching resistor at the receiving-end of the cable  
or transmission media. The SN65LVDT series of  
receivers eliminates this external resistor by  
integrating it with the receiver. The nonterminated  
SN65LVDS series is also available for multidrop  
or other termination circuits.  
Yes  
Add the suffix R for taped and reeled carrier.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
1
The signalling rate of a line, is the number of voltage transitions that are made per second expressed in the units bps (bits per second).  
ꢉꢢ  
Copyright 2001 − 2004, Texas Instruments Incorporated  
ꢞ ꢢ ꢟ ꢞꢗ ꢘꢬ ꢚꢙ ꢝ ꢥꢥ ꢣꢝ ꢛ ꢝ ꢜ ꢢ ꢞ ꢢ ꢛ ꢟ ꢧ  
1
WWW.TI.COM  

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